From patchwork Sat Dec 16 03:55:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yixun Lan X-Patchwork-Id: 849460 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yzD3X181pz9s5L for ; Sat, 16 Dec 2017 14:55:36 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756579AbdLPDzJ (ORCPT ); Fri, 15 Dec 2017 22:55:09 -0500 Received: from mail-sh2.amlogic.com ([58.32.228.45]:6033 "EHLO mail-sh2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755977AbdLPDzI (ORCPT ); Fri, 15 Dec 2017 22:55:08 -0500 Received: from localhost.localdomain (10.18.20.164) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server id 15.0.1320.4; Sat, 16 Dec 2017 11:54:30 +0800 From: Yixun Lan To: , Kevin Hilman CC: Neil Armstrong , Jerome Brunet , Giuseppe Cavallaro , Alexandre Torgue , Carlo Caione , Yixun Lan , , , , Subject: [PATCH v4 0/2] Add ethernet support for Meson-AXG SoC Date: Sat, 16 Dec 2017 11:55:25 +0800 Message-ID: <20171216035527.96952-1-yixun.lan@amlogic.com> X-Mailer: git-send-email 2.15.1 MIME-Version: 1.0 X-Originating-IP: [10.18.20.164] Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This series try to add support for the ethernet MAC controller found in Meson-AXG SoC, and also enable it in the S400 board. Hi Kevin: You still need to at least merge the clock patch[3] in order to compile the DTS, or just merge the tag from meson-clock's tree[6] - the tag is 'meson-clk-for-v4.16-2', since the clock part already taken there. Changes in v4 since [5]: - rebase to kevin's v4.16/dt64 - fix order Changes in v3 since [4]: - put clock DT info in soc.dtsi - separate DT for 'add support for the controller' vs 'enable in board' Changes in v2 since [1]: - rebase to kevin's v4.16/dt64 branch - add Neil's Reviewed-by - move clock info to board.dts instead of in soc.dtsi - drop "meson-axg-dwmac" compatible string, since we didn't use this we could re-add it later when we really need. - note: to make ethernet work properly,it depend on clock & pinctrl[2], to compile the DTS, the patch [3] is required. the code part will be taken via clock & pinctrl subsystem tree. [5] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005783.html http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005784.html http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005785.html [4] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005768.html [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005301.html [2] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005735.html http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005694.html [3] http://lists.infradead.org/pipermail/linux-amlogic/2017-December/005738.html [6] git://github.com/BayLibre/clk-meson.git Yixun Lan (2): ARM64: dts: meson-axg: add ethernet mac controller ARM64: dts: meson-axg: enable ethernet for A113D S400 board arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 7 ++++ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 54 ++++++++++++++++++++++++++ 2 files changed, 61 insertions(+)