From patchwork Wed Apr 24 17:17:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Voon, Weifeng" X-Patchwork-Id: 1090013 Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44pvq33cN6z9s3Z for ; Wed, 24 Apr 2019 19:17:35 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728211AbfDXJQh (ORCPT ); Wed, 24 Apr 2019 05:16:37 -0400 Received: from mga05.intel.com ([192.55.52.43]:1102 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727228AbfDXJQg (ORCPT ); Wed, 24 Apr 2019 05:16:36 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Apr 2019 02:16:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,389,1549958400"; d="scan'208";a="145260854" Received: from wvoon-ilbpg2.png.intel.com ([10.88.227.88]) by orsmga003.jf.intel.com with ESMTP; 24 Apr 2019 02:16:30 -0700 From: Weifeng Voon To: "David S. Miller" Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Ong Boon Leong , Kweh Hock Leong , Weifeng Voon Subject: [PATCH 0/7] net: stmmac: enable EHL SGMII Date: Thu, 25 Apr 2019 01:17:14 +0800 Message-Id: <1556126241-2774-1-git-send-email-weifeng.voon@intel.com> X-Mailer: git-send-email 1.9.1 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: "Voon, Weifeng" This patch-set is to enable Ethernet controller (DW Ethernet QoS and DW Ethernet PCS) with SGMII interface in Elkhart Lake. The DW Ethernet PCS is the Physical Coding Sublayer that is between Ethernet MAC and PHY and uses MDIO Clause-45 as Communication. Kweh Hock Leong (1): net: stmmac: enable clause 45 mdio support Ong Boon Leong (3): net: stmmac: introducing support for DWC xPCS logics net: stmmac: add xpcs function hooks into main driver and ethtool net: stmmac: add xPCS functions for device with DWMACv5.1 Weifeng Voon (3): net: stmmac: add EHL SGMII 1Gbps platform data and PCI ID net: stmmac: dma channel control register need to be init first net: stmmac: add xPCS platform data for EHL drivers/net/ethernet/stmicro/stmmac/dw_xpcs.h | 288 +++++++++++++++++++++ drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 67 +++++ drivers/net/ethernet/stmicro/stmmac/hwif.c | 31 ++- drivers/net/ethernet/stmicro/stmmac/hwif.h | 18 ++ drivers/net/ethernet/stmicro/stmmac/stmmac.h | 2 + .../net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 14 + drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 58 ++++- drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 36 ++- drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 108 ++++++++ include/linux/phy.h | 2 + include/linux/stmmac.h | 3 + 11 files changed, 616 insertions(+), 11 deletions(-) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dw_xpcs.h --- 1.9.1