diff mbox series

[V2,1/5] tools/testing/selftests/powerpc: Enable pmu selftests for power11

Message ID 20250113075858.45137-1-atrajeev@linux.vnet.ibm.com (mailing list archive)
State Accepted
Commit fd4d2f325192a11b0bff8bf6226285a821bf38db
Headers show
Series [V2,1/5] tools/testing/selftests/powerpc: Enable pmu selftests for power11 | expand

Commit Message

Athira Rajeev Jan. 13, 2025, 7:58 a.m. UTC
Add check for power11 pvr in the selftest utility
functions. Selftests uses pvr value to check for platform
support inorder to run the tests. pvr is also used to
send the extended mask value to capture sampling registers.

Update some of the utility functions to use hwcap2 inorder
to return platform specific bits from sampling registers.

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
---
Changelog:
 v1 -> v2
 No code changes. Rebased to latest upstream

 .../selftests/powerpc/pmu/sampling_tests/misc.c       | 11 ++++++++++-
 .../selftests/powerpc/pmu/sampling_tests/misc.h       | 10 ++++++----
 2 files changed, 16 insertions(+), 5 deletions(-)

Comments

Madhavan Srinivasan Feb. 17, 2025, 7:28 a.m. UTC | #1
On Mon, 13 Jan 2025 13:28:54 +0530, Athira Rajeev wrote:
> Add check for power11 pvr in the selftest utility
> functions. Selftests uses pvr value to check for platform
> support inorder to run the tests. pvr is also used to
> send the extended mask value to capture sampling registers.
> 
> Update some of the utility functions to use hwcap2 inorder
> to return platform specific bits from sampling registers.
> 
> [...]

Applied to powerpc/next.

[1/5] tools/testing/selftests/powerpc: Enable pmu selftests for power11
      https://git.kernel.org/powerpc/c/fd4d2f325192a11b0bff8bf6226285a821bf38db
[2/5] tools/testing/selftests/powerpc: Add check for power11 pvr for pmu selfests
      https://git.kernel.org/powerpc/c/520ee327c59d37c5520b177404f57c974cc098cc
[3/5] tools/testing/selftests/powerpc/pmu: Update comment description to mention ISA v3.1 for power10 and above
      https://git.kernel.org/powerpc/c/43751c3ce276afc475fea769ae2abf690d5f4b91
[4/5] selftests/powerpc/pmu: Add interface test for extended reg support
      https://git.kernel.org/powerpc/c/9785def2593c7c62fa3271d740eef0e1d1874ef4
[5/5] selftests/powerpc/pmu: Update comment with details to understand auxv_generic_compat_pmu() utility function
      https://git.kernel.org/powerpc/c/c96b1402cc8fe818b0aaaee280221a5e7b6b2242

Thanks
diff mbox series

Patch

diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.c b/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.c
index eac6420abdf1..c52d8bc2a5dc 100644
--- a/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.c
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.c
@@ -59,6 +59,7 @@  static void init_ev_encodes(void)
 	ev_shift_thd_stop = 32;
 
 	switch (pvr) {
+	case POWER11:
 	case POWER10:
 		ev_mask_thd_cmp = 0x3ffff;
 		ev_shift_thd_cmp = 0;
@@ -129,8 +130,14 @@  int platform_check_for_tests(void)
 	 * Check for supported platforms
 	 * for sampling test
 	 */
-	if ((pvr != POWER10) && (pvr != POWER9))
+	switch (pvr) {
+	case POWER11:
+	case POWER10:
+	case POWER9:
+		break;
+	default:
 		goto out;
+	}
 
 	/*
 	 * Check PMU driver registered by looking for
@@ -499,6 +506,8 @@  static bool auxv_generic_compat_pmu(void)
 		base_pvr = POWER9;
 	else if (!strcmp(auxv_base_platform(), "power10"))
 		base_pvr = POWER10;
+	else if (!strcmp(auxv_base_platform(), "power11"))
+		base_pvr = POWER11;
 
 	return (!base_pvr);
 }
diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.h b/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.h
index 64e25cce1435..09c5abe237af 100644
--- a/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.h
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.h
@@ -8,10 +8,12 @@ 
 #include <sys/stat.h>
 #include "../event.h"
 
+#define POWER11 0x82
 #define POWER10 0x80
 #define POWER9  0x4e
 #define PERF_POWER9_MASK        0x7f8ffffffffffff
 #define PERF_POWER10_MASK       0x7ffffffffffffff
+#define PERF_POWER11_MASK       PERF_POWER10_MASK
 
 #define MMCR0_FC56      0x00000010UL /* freeze counters 5 and 6 */
 #define MMCR0_PMCCEXT   0x00000200UL /* PMCCEXT control */
@@ -165,21 +167,21 @@  static inline int get_mmcr2_fcta(u64 mmcr2, int pmc)
 
 static inline int get_mmcr2_l2l3(u64 mmcr2, int pmc)
 {
-	if (pvr == POWER10)
+	if (have_hwcap2(PPC_FEATURE2_ARCH_3_1))
 		return ((mmcr2 & 0xf8) >> 3);
 	return 0;
 }
 
 static inline int get_mmcr3_src(u64 mmcr3, int pmc)
 {
-	if (pvr != POWER10)
+	if (!have_hwcap2(PPC_FEATURE2_ARCH_3_1))
 		return 0;
 	return ((mmcr3 >> ((49 - (15 * ((pmc) - 1))))) & 0x7fff);
 }
 
 static inline int get_mmcra_thd_cmp(u64 mmcra, int pmc)
 {
-	if (pvr == POWER10)
+	if (have_hwcap2(PPC_FEATURE2_ARCH_3_1))
 		return ((mmcra >> 45) & 0x7ff);
 	return ((mmcra >> 45) & 0x3ff);
 }
@@ -191,7 +193,7 @@  static inline int get_mmcra_sm(u64 mmcra, int pmc)
 
 static inline u64 get_mmcra_bhrb_disable(u64 mmcra, int pmc)
 {
-	if (pvr == POWER10)
+	if (have_hwcap2(PPC_FEATURE2_ARCH_3_1))
 		return mmcra & BHRB_DISABLE;
 	return 0;
 }