diff mbox series

[v5,1/3] powerpc/book3s64/radix: Add H_RPT_INVALIDATE pgsize encodings to mmu_psize_def

Message ID 20210224082510.3962423-2-bharata@linux.ibm.com (mailing list archive)
State Superseded
Headers show
Series Support for H_RPT_INVALIDATE in PowerPC KVM | expand

Checks

Context Check Description
snowpatch_ozlabs/apply_patch success Successfully applied on branch powerpc/merge (626a6c3d2e20da80aaa710104f34ea6037b28b33)
snowpatch_ozlabs/checkpatch success total: 0 errors, 0 warnings, 0 checks, 27 lines checked
snowpatch_ozlabs/needsstable success Patch has no Fixes tags

Commit Message

Bharata B Rao Feb. 24, 2021, 8:25 a.m. UTC
Add a field to mmu_psize_def to store the page size encodings
of H_RPT_INVALIDATE hcall. Initialize this while scanning the radix
AP encodings. This will be used when invalidating with required
page size encoding in the hcall.

Signed-off-by: Bharata B Rao <bharata@linux.ibm.com>
---
 arch/powerpc/include/asm/book3s/64/mmu.h | 1 +
 arch/powerpc/mm/book3s64/radix_pgtable.c | 5 +++++
 2 files changed, 6 insertions(+)

Comments

David Gibson March 2, 2021, 1:28 a.m. UTC | #1
On Wed, Feb 24, 2021 at 01:55:08PM +0530, Bharata B Rao wrote:
> Add a field to mmu_psize_def to store the page size encodings
> of H_RPT_INVALIDATE hcall. Initialize this while scanning the radix
> AP encodings. This will be used when invalidating with required
> page size encoding in the hcall.
> 
> Signed-off-by: Bharata B Rao <bharata@linux.ibm.com>
> ---
>  arch/powerpc/include/asm/book3s/64/mmu.h | 1 +
>  arch/powerpc/mm/book3s64/radix_pgtable.c | 5 +++++
>  2 files changed, 6 insertions(+)
> 
> diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h
> index eace8c3f7b0a..c02f42d1031e 100644
> --- a/arch/powerpc/include/asm/book3s/64/mmu.h
> +++ b/arch/powerpc/include/asm/book3s/64/mmu.h
> @@ -19,6 +19,7 @@ struct mmu_psize_def {
>  	int		penc[MMU_PAGE_COUNT];	/* HPTE encoding */
>  	unsigned int	tlbiel;	/* tlbiel supported for that page size */
>  	unsigned long	avpnm;	/* bits to mask out in AVPN in the HPTE */
> +	unsigned long   h_rpt_pgsize; /* H_RPT_INVALIDATE page size encoding */
>  	union {
>  		unsigned long	sllp;	/* SLB L||LP (exact mask to use in slbmte) */
>  		unsigned long ap;	/* Ap encoding used by PowerISA 3.0 */
> diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c
> index 98f0b243c1ab..1b749899016b 100644
> --- a/arch/powerpc/mm/book3s64/radix_pgtable.c
> +++ b/arch/powerpc/mm/book3s64/radix_pgtable.c
> @@ -486,6 +486,7 @@ static int __init radix_dt_scan_page_sizes(unsigned long node,
>  		def = &mmu_psize_defs[idx];
>  		def->shift = shift;
>  		def->ap  = ap;
> +		def->h_rpt_pgsize = psize_to_rpti_pgsize(idx);
>  	}
>  
>  	/* needed ? */
> @@ -560,9 +561,13 @@ void __init radix__early_init_devtree(void)
>  		 */
>  		mmu_psize_defs[MMU_PAGE_4K].shift = 12;
>  		mmu_psize_defs[MMU_PAGE_4K].ap = 0x0;
> +		mmu_psize_defs[MMU_PAGE_4K].h_rpt_pgsize =
> +			psize_to_rpti_pgsize(MMU_PAGE_4K);

Hm.  TBH, I was thinking of this as replacing psize_to_rpti_pgsize() -
that is, you directly put the correct codes in there, then just have
psize_to_rpti_pgsize() look them up in the table.

I guess that could be a followup change, though.

>  
>  		mmu_psize_defs[MMU_PAGE_64K].shift = 16;
>  		mmu_psize_defs[MMU_PAGE_64K].ap = 0x5;
> +		mmu_psize_defs[MMU_PAGE_64K].h_rpt_pgsize =
> +			psize_to_rpti_pgsize(MMU_PAGE_64K);
>  	}
>  
>  	/*
Bharata B Rao March 2, 2021, 4:21 a.m. UTC | #2
On Tue, Mar 02, 2021 at 12:28:34PM +1100, David Gibson wrote:
> On Wed, Feb 24, 2021 at 01:55:08PM +0530, Bharata B Rao wrote:
> > Add a field to mmu_psize_def to store the page size encodings
> > of H_RPT_INVALIDATE hcall. Initialize this while scanning the radix
> > AP encodings. This will be used when invalidating with required
> > page size encoding in the hcall.
> > 
> > Signed-off-by: Bharata B Rao <bharata@linux.ibm.com>
> > ---
> >  arch/powerpc/include/asm/book3s/64/mmu.h | 1 +
> >  arch/powerpc/mm/book3s64/radix_pgtable.c | 5 +++++
> >  2 files changed, 6 insertions(+)
> > 
> > diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h
> > index eace8c3f7b0a..c02f42d1031e 100644
> > --- a/arch/powerpc/include/asm/book3s/64/mmu.h
> > +++ b/arch/powerpc/include/asm/book3s/64/mmu.h
> > @@ -19,6 +19,7 @@ struct mmu_psize_def {
> >  	int		penc[MMU_PAGE_COUNT];	/* HPTE encoding */
> >  	unsigned int	tlbiel;	/* tlbiel supported for that page size */
> >  	unsigned long	avpnm;	/* bits to mask out in AVPN in the HPTE */
> > +	unsigned long   h_rpt_pgsize; /* H_RPT_INVALIDATE page size encoding */
> >  	union {
> >  		unsigned long	sllp;	/* SLB L||LP (exact mask to use in slbmte) */
> >  		unsigned long ap;	/* Ap encoding used by PowerISA 3.0 */
> > diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c
> > index 98f0b243c1ab..1b749899016b 100644
> > --- a/arch/powerpc/mm/book3s64/radix_pgtable.c
> > +++ b/arch/powerpc/mm/book3s64/radix_pgtable.c
> > @@ -486,6 +486,7 @@ static int __init radix_dt_scan_page_sizes(unsigned long node,
> >  		def = &mmu_psize_defs[idx];
> >  		def->shift = shift;
> >  		def->ap  = ap;
> > +		def->h_rpt_pgsize = psize_to_rpti_pgsize(idx);
> >  	}
> >  
> >  	/* needed ? */
> > @@ -560,9 +561,13 @@ void __init radix__early_init_devtree(void)
> >  		 */
> >  		mmu_psize_defs[MMU_PAGE_4K].shift = 12;
> >  		mmu_psize_defs[MMU_PAGE_4K].ap = 0x0;
> > +		mmu_psize_defs[MMU_PAGE_4K].h_rpt_pgsize =
> > +			psize_to_rpti_pgsize(MMU_PAGE_4K);
> 
> Hm.  TBH, I was thinking of this as replacing psize_to_rpti_pgsize() -
> that is, you directly put the correct codes in there, then just have
> psize_to_rpti_pgsize() look them up in the table.
> 
> I guess that could be a followup change, though.
> 
> >  
> >  		mmu_psize_defs[MMU_PAGE_64K].shift = 16;
> >  		mmu_psize_defs[MMU_PAGE_64K].ap = 0x5;
> > +		mmu_psize_defs[MMU_PAGE_64K].h_rpt_pgsize =
> > +			psize_to_rpti_pgsize(MMU_PAGE_64K);

Hmm if you see I got rid of rpti_pgsize_to_psize() by having the
defines directly in mmu_psize_def[].

There are two cases in the above code (radix__early_init_devtree)

1. If radix pagesize encodings are present in the DT, we walk
the page sizes in the loop and populate the enconding for
H_RPT_INVALIDATE. I am not sure if we can use the direct codes
in this case.

2. If DT doesn't have the radix pagesize encodings, 4K and 64K
sizes are assumed as fallback sizes where we can use direct
encodings.

Regards,
Bharata.
David Gibson March 4, 2021, 7 a.m. UTC | #3
On Tue, Mar 02, 2021 at 09:51:28AM +0530, Bharata B Rao wrote:
> On Tue, Mar 02, 2021 at 12:28:34PM +1100, David Gibson wrote:
> > On Wed, Feb 24, 2021 at 01:55:08PM +0530, Bharata B Rao wrote:
> > > Add a field to mmu_psize_def to store the page size encodings
> > > of H_RPT_INVALIDATE hcall. Initialize this while scanning the radix
> > > AP encodings. This will be used when invalidating with required
> > > page size encoding in the hcall.
> > > 
> > > Signed-off-by: Bharata B Rao <bharata@linux.ibm.com>
> > > ---
> > >  arch/powerpc/include/asm/book3s/64/mmu.h | 1 +
> > >  arch/powerpc/mm/book3s64/radix_pgtable.c | 5 +++++
> > >  2 files changed, 6 insertions(+)
> > > 
> > > diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h
> > > index eace8c3f7b0a..c02f42d1031e 100644
> > > --- a/arch/powerpc/include/asm/book3s/64/mmu.h
> > > +++ b/arch/powerpc/include/asm/book3s/64/mmu.h
> > > @@ -19,6 +19,7 @@ struct mmu_psize_def {
> > >  	int		penc[MMU_PAGE_COUNT];	/* HPTE encoding */
> > >  	unsigned int	tlbiel;	/* tlbiel supported for that page size */
> > >  	unsigned long	avpnm;	/* bits to mask out in AVPN in the HPTE */
> > > +	unsigned long   h_rpt_pgsize; /* H_RPT_INVALIDATE page size encoding */
> > >  	union {
> > >  		unsigned long	sllp;	/* SLB L||LP (exact mask to use in slbmte) */
> > >  		unsigned long ap;	/* Ap encoding used by PowerISA 3.0 */
> > > diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c
> > > index 98f0b243c1ab..1b749899016b 100644
> > > --- a/arch/powerpc/mm/book3s64/radix_pgtable.c
> > > +++ b/arch/powerpc/mm/book3s64/radix_pgtable.c
> > > @@ -486,6 +486,7 @@ static int __init radix_dt_scan_page_sizes(unsigned long node,
> > >  		def = &mmu_psize_defs[idx];
> > >  		def->shift = shift;
> > >  		def->ap  = ap;
> > > +		def->h_rpt_pgsize = psize_to_rpti_pgsize(idx);
> > >  	}
> > >  
> > >  	/* needed ? */
> > > @@ -560,9 +561,13 @@ void __init radix__early_init_devtree(void)
> > >  		 */
> > >  		mmu_psize_defs[MMU_PAGE_4K].shift = 12;
> > >  		mmu_psize_defs[MMU_PAGE_4K].ap = 0x0;
> > > +		mmu_psize_defs[MMU_PAGE_4K].h_rpt_pgsize =
> > > +			psize_to_rpti_pgsize(MMU_PAGE_4K);
> > 
> > Hm.  TBH, I was thinking of this as replacing psize_to_rpti_pgsize() -
> > that is, you directly put the correct codes in there, then just have
> > psize_to_rpti_pgsize() look them up in the table.
> > 
> > I guess that could be a followup change, though.
> > 
> > >  
> > >  		mmu_psize_defs[MMU_PAGE_64K].shift = 16;
> > >  		mmu_psize_defs[MMU_PAGE_64K].ap = 0x5;
> > > +		mmu_psize_defs[MMU_PAGE_64K].h_rpt_pgsize =
> > > +			psize_to_rpti_pgsize(MMU_PAGE_64K);
> 
> Hmm if you see I got rid of rpti_pgsize_to_psize() by having the
> defines directly in mmu_psize_def[].

I realize that, but I'm talking about the reverse direction:
psize_to_rpti_pgsize().  You should be able to reduce it a table
lookup, so the mmu_psize_defs table is the only place this information
exists.

> There are two cases in the above code (radix__early_init_devtree)
> 
> 1. If radix pagesize encodings are present in the DT, we walk
> the page sizes in the loop and populate the enconding for
> H_RPT_INVALIDATE. I am not sure if we can use the direct codes
> in this case.

I'm not understanding the problem.

In any case the existing implementation of psize

Why ever not?  You can just update the mmu_psize_defs when you parse
the device tree.  Plus AFAICT, the existing psize_to_rpti
implementation doesn't take into account any device tree eencodings.

> 2. If DT doesn't have the radix pagesize encodings, 4K and 64K
> sizes are assumed as fallback sizes where we can use direct
> encodings.

Right... still not seeing the problem.
diff mbox series

Patch

diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h
index eace8c3f7b0a..c02f42d1031e 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu.h
@@ -19,6 +19,7 @@  struct mmu_psize_def {
 	int		penc[MMU_PAGE_COUNT];	/* HPTE encoding */
 	unsigned int	tlbiel;	/* tlbiel supported for that page size */
 	unsigned long	avpnm;	/* bits to mask out in AVPN in the HPTE */
+	unsigned long   h_rpt_pgsize; /* H_RPT_INVALIDATE page size encoding */
 	union {
 		unsigned long	sllp;	/* SLB L||LP (exact mask to use in slbmte) */
 		unsigned long ap;	/* Ap encoding used by PowerISA 3.0 */
diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c
index 98f0b243c1ab..1b749899016b 100644
--- a/arch/powerpc/mm/book3s64/radix_pgtable.c
+++ b/arch/powerpc/mm/book3s64/radix_pgtable.c
@@ -486,6 +486,7 @@  static int __init radix_dt_scan_page_sizes(unsigned long node,
 		def = &mmu_psize_defs[idx];
 		def->shift = shift;
 		def->ap  = ap;
+		def->h_rpt_pgsize = psize_to_rpti_pgsize(idx);
 	}
 
 	/* needed ? */
@@ -560,9 +561,13 @@  void __init radix__early_init_devtree(void)
 		 */
 		mmu_psize_defs[MMU_PAGE_4K].shift = 12;
 		mmu_psize_defs[MMU_PAGE_4K].ap = 0x0;
+		mmu_psize_defs[MMU_PAGE_4K].h_rpt_pgsize =
+			psize_to_rpti_pgsize(MMU_PAGE_4K);
 
 		mmu_psize_defs[MMU_PAGE_64K].shift = 16;
 		mmu_psize_defs[MMU_PAGE_64K].ap = 0x5;
+		mmu_psize_defs[MMU_PAGE_64K].h_rpt_pgsize =
+			psize_to_rpti_pgsize(MMU_PAGE_64K);
 	}
 
 	/*