@@ -7,6 +7,9 @@
/include/ "p2020si-pre.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
/ {
model = "fsl,P2020RDB";
compatible = "fsl,P2020RDB";
@@ -131,22 +134,84 @@ partition@1100000 {
L2switch@2,0 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "vitesse-7385";
+ compatible = "vitesse,vsc7385";
reg = <0x2 0x0 0x20000>;
- };
+ reset-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@1 {
+ reg = <1>;
+ label = "e1-sw-p1";
+ };
+ port@2 {
+ reg = <2>;
+ label = "e1-sw-p2";
+ };
+ port@3 {
+ reg = <3>;
+ label = "e1-sw-p3";
+ };
+ port@4 {
+ reg = <4>;
+ label = "e1-sw-p4";
+ };
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&enet0>;
+ phy-mode = "rgmii";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+ };
};
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
+ gpio0: gpio-controller@fc00 {
+ };
+
i2c@3000 {
+ temperature-sensor@4c {
+ compatible = "adi,adt7461";
+ reg = <0x4c>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c256";
+ reg = <0x50>;
+ };
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
+ i2c@3100 {
+ pmic@11 {
+ compatible = "zl2006";
+ reg = <0x11>;
+ };
+
+ gpio@18 {
+ compatible = "nxp,pca9557";
+ reg = <0x18>;
+ };
+
+ eeprom@52 {
+ compatible = "atmel,24c01";
+ reg = <0x52>;
+ };
+ };
+
spi@7000 {
flash@0 {
#address-cells = <1>;
@@ -200,10 +265,12 @@ mdio@24520 {
phy0: ethernet-phy@0 {
interrupts = <3 1 0 0>;
reg = <0x0>;
+ reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
phy1: ethernet-phy@1 {
interrupts = <3 1 0 0>;
reg = <0x1>;
+ reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
tbi-phy@2 {
device_type = "tbi-phy";
@@ -233,7 +300,7 @@ ptp_clock@24e00 {
enet0: ethernet@24000 {
fixed-link = <1 1 1000 0 0>;
- phy-connection-type = "rgmii-id";
+ phy-connection-type = "rgmii";
};
enet1: ethernet@25000 {
This patch adds dts entry for some peripherials: - i2c: temperature sensor ADT7461 - i2c: eeprom m24256 - i2c: eeprom at24c01 - i2c: pmic zl2006 - i2c: gpio expander - phy: reset pins for phy - dsa: switch vsc7385 It was required to adjust rgmii settings for enet0 because switch with dsa driver act different without 8081 sterring. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> --- arch/powerpc/boot/dts/fsl/p2020rdb.dts | 73 ++++++++++++++++++++++++-- 1 file changed, 70 insertions(+), 3 deletions(-)