Message ID | 20200720044258.863574-1-bharata@linux.ibm.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 9a77c4a0a12597c661be374b8d566516c0341570 |
Headers | show |
Series | [FIX] powerpc/prom: Enable Radix GTSE in cpu pa-features | expand |
Excerpts from Bharata B Rao's message of July 20, 2020 2:42 pm: > From: Nicholas Piggin <npiggin@gmail.com> > > When '029ab30b4c0a ("powerpc/mm: Enable radix GTSE only if supported.")' > made GTSE an MMU feature, it was enabled by default in > powerpc-cpu-features but was missed in pa-features. This causes > random memory corruption during boot of PowerNV kernels where > CONFIG_PPC_DT_CPU_FTRS isn't enabled. Thanks for writing this up, I got a bit bogged down with other things. > Fixes: 029ab30b4c0a ("powerpc/mm: Enable radix GTSE only if supported.") > Reported-by: Qian Cai <cai@lca.pw> > Signed-off-by: Nicholas Piggin <npiggin@gmail.com> > Signed-off-by: Bharata B Rao <bharata@linux.ibm.com> > --- > arch/powerpc/kernel/prom.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c > index 9cc49f265c86..a9594bad572a 100644 > --- a/arch/powerpc/kernel/prom.c > +++ b/arch/powerpc/kernel/prom.c > @@ -163,7 +163,8 @@ static struct ibm_pa_feature { > { .pabyte = 0, .pabit = 6, .cpu_features = CPU_FTR_NOEXECUTE }, > { .pabyte = 1, .pabit = 2, .mmu_features = MMU_FTR_CI_LARGE_PAGE }, > #ifdef CONFIG_PPC_RADIX_MMU > - { .pabyte = 40, .pabit = 0, .mmu_features = MMU_FTR_TYPE_RADIX }, > + { .pabyte = 40, .pabit = 0, > + .mmu_features = (MMU_FTR_TYPE_RADIX | MMU_FTR_GTSE) }, It might look better like this: { .pabyte = 1, .pabit = 2, .mmu_features = MMU_FTR_CI_LARGE_PAGE }, #ifdef CONFIG_PPC_RADIX_MMU { .pabyte = 40, .pabit = 0, .mmu_features = MMU_FTR_TYPE_RADIX }, { .pabyte = 40, .pabit = 0, .mmu_features = MMU_FTR_TYPE_RADIX | MMU_FTR_GTSE }, #endif { .pabyte = 1, .pabit = 1, .invert = 1, .cpu_features = CPU_FTR_NODSISRALIGN }, But that's bikeshedding a bit and the optional bits already put it out of alignment. Thanks, Nick
On Mon, Jul 20, 2020 at 03:38:29PM +1000, Nicholas Piggin wrote: > Excerpts from Bharata B Rao's message of July 20, 2020 2:42 pm: > > diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c > > index 9cc49f265c86..a9594bad572a 100644 > > --- a/arch/powerpc/kernel/prom.c > > +++ b/arch/powerpc/kernel/prom.c > > @@ -163,7 +163,8 @@ static struct ibm_pa_feature { > > { .pabyte = 0, .pabit = 6, .cpu_features = CPU_FTR_NOEXECUTE }, > > { .pabyte = 1, .pabit = 2, .mmu_features = MMU_FTR_CI_LARGE_PAGE }, > > #ifdef CONFIG_PPC_RADIX_MMU > > - { .pabyte = 40, .pabit = 0, .mmu_features = MMU_FTR_TYPE_RADIX }, > > + { .pabyte = 40, .pabit = 0, > > + .mmu_features = (MMU_FTR_TYPE_RADIX | MMU_FTR_GTSE) }, > > It might look better like this: > > { .pabyte = 1, .pabit = 2, .mmu_features = MMU_FTR_CI_LARGE_PAGE }, > #ifdef CONFIG_PPC_RADIX_MMU > { .pabyte = 40, .pabit = 0, .mmu_features = MMU_FTR_TYPE_RADIX }, > { .pabyte = 40, .pabit = 0, .mmu_features = MMU_FTR_TYPE_RADIX | > MMU_FTR_GTSE }, > #endif > { .pabyte = 1, .pabit = 1, .invert = 1, .cpu_features = CPU_FTR_NODSISRALIGN }, > > But that's bikeshedding a bit and the optional bits already put it out > of alignment. Here it is... From 1be7f3f8b43503740431b7bdf585e488ecdeb48f Mon Sep 17 00:00:00 2001 From: Nicholas Piggin <npiggin@gmail.com> Date: Mon, 20 Jul 2020 09:05:05 +0530 Subject: [FIX PATCH] powerpc/prom: Enable Radix GTSE in cpu pa-features When '029ab30b4c0a ("powerpc/mm: Enable radix GTSE only if supported.")' made GTSE an MMU feature, it was enabled by default in powerpc-cpu-features but was missed in pa-features. This causes random memory corruption during boot of PowerNV kernels if CONFIG_PPC_DT_CPU_FTRS isn't enabled. Fixes: 029ab30b4c0a ("powerpc/mm: Enable radix GTSE only if supported.") Reported-by: Qian Cai <cai@lca.pw> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Bharata B Rao <bharata@linux.ibm.com> --- arch/powerpc/kernel/prom.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index 9cc49f265c86..dae30e805e42 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c @@ -163,7 +163,8 @@ static struct ibm_pa_feature { { .pabyte = 0, .pabit = 6, .cpu_features = CPU_FTR_NOEXECUTE }, { .pabyte = 1, .pabit = 2, .mmu_features = MMU_FTR_CI_LARGE_PAGE }, #ifdef CONFIG_PPC_RADIX_MMU - { .pabyte = 40, .pabit = 0, .mmu_features = MMU_FTR_TYPE_RADIX }, + { .pabyte = 40, .pabit = 0, .mmu_features = MMU_FTR_TYPE_RADIX | + MMU_FTR_GTSE }, #endif { .pabyte = 1, .pabit = 1, .invert = 1, .cpu_features = CPU_FTR_NODSISRALIGN }, { .pabyte = 5, .pabit = 0, .cpu_features = CPU_FTR_REAL_LE,
On Mon, 20 Jul 2020 10:12:58 +0530, Bharata B Rao wrote: > When '029ab30b4c0a ("powerpc/mm: Enable radix GTSE only if supported.")' > made GTSE an MMU feature, it was enabled by default in > powerpc-cpu-features but was missed in pa-features. This causes > random memory corruption during boot of PowerNV kernels where > CONFIG_PPC_DT_CPU_FTRS isn't enabled. Applied to powerpc/next. [1/1] powerpc/prom: Enable Radix GTSE in cpu pa-features https://git.kernel.org/powerpc/c/9a77c4a0a12597c661be374b8d566516c0341570 cheers
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index 9cc49f265c86..a9594bad572a 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c @@ -163,7 +163,8 @@ static struct ibm_pa_feature { { .pabyte = 0, .pabit = 6, .cpu_features = CPU_FTR_NOEXECUTE }, { .pabyte = 1, .pabit = 2, .mmu_features = MMU_FTR_CI_LARGE_PAGE }, #ifdef CONFIG_PPC_RADIX_MMU - { .pabyte = 40, .pabit = 0, .mmu_features = MMU_FTR_TYPE_RADIX }, + { .pabyte = 40, .pabit = 0, + .mmu_features = (MMU_FTR_TYPE_RADIX | MMU_FTR_GTSE) }, #endif { .pabyte = 1, .pabit = 1, .invert = 1, .cpu_features = CPU_FTR_NODSISRALIGN }, { .pabyte = 5, .pabit = 0, .cpu_features = CPU_FTR_REAL_LE,