From patchwork Mon Aug 14 20:00:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= X-Patchwork-Id: 801313 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=rere.qmqm.pl header.i=@rere.qmqm.pl header.b="dm86bHzP"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xWRL83W34z9sPm for ; Tue, 15 Aug 2017 06:00:32 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751603AbdHNUAb (ORCPT ); Mon, 14 Aug 2017 16:00:31 -0400 Received: from 78-11-180-123.static.ip.netia.com.pl ([78.11.180.123]:46946 "EHLO rere.qmqm.pl" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751389AbdHNUA3 (ORCPT ); Mon, 14 Aug 2017 16:00:29 -0400 Received: from remote.user (localhost [127.0.0.1]) by rere.qmqm.pl (Postfix) with ESMTPSA id 3xWRL26sNtz43; Mon, 14 Aug 2017 22:00:26 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=rere.qmqm.pl; s=1; t=1502740827; bh=gyKNzv7gPAc+YXDWn/ezp1j1cQ2rCwOY0PQXp+rtVBM=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=dm86bHzPlS3B5BrZXKLSUSsFLTsGlUfU3KdUI63l299d+SitFkYaXkAOk09bvuJiu r/Tc0PuSGkPeLiI/XhNhNLid6nXOh5MJ4anYx9tIkY6f5bo6AJ297pBxfwRZSyNDMy 8BURHLdxpLmEUClGysMxXwJ1tv/Ty5NH4Mr3bTiEUx9cC/WXyNIlL3wJL5doXtrfNg v2OtHb//Ma4eQ/eWPlCVinNVajD7XGb20nSdW+iV3wYuddRKeKhjKKdRtnOwMhgvsk Lu/AXGi4XeFcyf9ZRld6Yjm8KSD37bKGp1qON8DKunFdY+zQ4E1Gm/t0tDlGfx2ULA FmJgKL/ZW7BwQ== X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.99.2 at rere Date: Mon, 14 Aug 2017 22:00:26 +0200 Message-Id: <471746dfd08fd4eeae2e747c4ce7f98371ac1e99.1502740497.git.mirq-linux@rere.qmqm.pl> In-Reply-To: References: From: =?UTF-8?q?Micha=C5=82=20Miros=C5=82aw?= Subject: [PATCH v2 4/4] mmc: sdhci-s3c: use generic sdhci_set_bus_width() MIME-Version: 1.0 To: Adrian Hunter , Ulf Hansson , Thierry Reding , Jonathan Hunter , Ben Dooks , Jaehoon Chung Cc: linux-mmc@vger.kernel.org, linux-tegra@vger.kernel.org Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Now that sdhci_set_bus_width() supports 8-bit bus widths based on the MMC_CAP_8_BIT_DATA capability flag, replace the sdhci-s3c version with the generic sdhci version. Signed-off-by: Michał Mirosław Acked-by: Adrian Hunter Acked-by: Jaehoon Chung --- drivers/mmc/host/sdhci-s3c.c | 34 +--------------------------------- 1 file changed, 1 insertion(+), 33 deletions(-) diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index 7c065a70f92b..d328fcf284d1 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c @@ -414,43 +414,11 @@ static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock) sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); } -/** - * sdhci_s3c_set_bus_width - support 8bit buswidth - * @host: The SDHCI host being queried - * @width: MMC_BUS_WIDTH_ macro for the bus width being requested - * - * We have 8-bit width support but is not a v3 controller. - * So we add platform_bus_width() and support 8bit width. - */ -static void sdhci_s3c_set_bus_width(struct sdhci_host *host, int width) -{ - u8 ctrl; - - ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); - - switch (width) { - case MMC_BUS_WIDTH_8: - ctrl |= SDHCI_CTRL_8BITBUS; - ctrl &= ~SDHCI_CTRL_4BITBUS; - break; - case MMC_BUS_WIDTH_4: - ctrl |= SDHCI_CTRL_4BITBUS; - ctrl &= ~SDHCI_CTRL_8BITBUS; - break; - default: - ctrl &= ~SDHCI_CTRL_4BITBUS; - ctrl &= ~SDHCI_CTRL_8BITBUS; - break; - } - - sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); -} - static struct sdhci_ops sdhci_s3c_ops = { .get_max_clock = sdhci_s3c_get_max_clk, .set_clock = sdhci_s3c_set_clock, .get_min_clock = sdhci_s3c_get_min_clock, - .set_bus_width = sdhci_s3c_set_bus_width, + .set_bus_width = sdhci_set_bus_width, .reset = sdhci_reset, .set_uhs_signaling = sdhci_set_uhs_signaling, };