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X-Microsoft-Antispam-Message-Info: a8dLrP0358BHTRkH6EqTtMe6Bsw3acUVIPfjK/23oj7bkyLuUi9qeihoYLetEnEIgC6zuRY+Ki/4D3a14RWCDk4eluzQVUQaj6AWIYqUcINkOi+pR0PY2Shh6pYOaHP2kCdzRtZAJRsHYqCjXMsJjbHFStoTWpgLzQ5EL1ZJWlq1XUA7MoAs5vHtJgdcuIZTe1XcNoIW5au/HvvVIamh0tEbWUdKyfcQzOEpmNnwFzWbk4ltRJkXEM9Czin4WbuWvde8ag0Rq/y2gJUPFnp/fE5wQUEERu/jtZU+QMbSpsDIr3mNZe97AiXACIPyBOBtfGHOmuEbsrQkuD1K1YRNBRsFw8wCSfhrG3+Ybs5aWrGEq9SkI9eNvYbgRw6nw718xl5aKI8VyRCG5JfV27ehI087fb2Eo5r5ipW8AH+6k9/I9adtXLLNr6ptu0XNxj/D7bpKTaYSfim4OevuWtaycaXXOOh2UJhpwdnmKAMBB2iAtIq2gg56ga0bb4J+TgDNLvkTSAgdl645KzBejuULMgadJBmeNTcK/0I8uhpnQryOROz4nLOTadL0woJNa2d7KGpoG5LGSkK+u05ayXmD+SuqFT7jd3uY+QoDMoZmmnfoxTRlO3a8xM5RNdpqkrjwt7a16oXoolvEYzzDuBf25/SqVnOk+4J3bKspZorAhlxVdOXXMDmJtKtUDmorgSFW3s0zpdxvHI96aZjI5Kr/pob54p21regUli7wcZuIPVoshyIpjCU5kszzwxQbNSPmVt9moDeg4Bg5DxXf4HwZuXxHnp6i6mzHQ4HToaFYwh+EQAreMOQvSV9q3PHnl9+dR5zIEJadHKQCH1qMrIb4e50cLoHRyIIRQUmAKGCxuNEfvEtDnXOyBTa41Cz3nwSVtxTGqMURtSDcg3IvlzzxPqxfTdCyINKiPUkyQQdkH2TUHNtI6O30k2MzIcidmYj0KIm8k1BHJNSTGiMDSAq94diEWYEwXEkiZbK9VvEnoZdt5sdhM6mCRNnf5WjdMkaAsuKAveV86oszWqfE9G/csNs4n9S2L/CjWIBhdGUpTDJ9ogGjWbQx5iocGxrOhM1gOHyTt06B9wWCQfCROs/jqpCV1ZuuEByfdDw6rLblm3trISx5net3gsMtUAyFP72Wvhi6J5iPc64i/elnVSbBT90NNXxh0rk1fJHJmDDWfu1I+zN+KLeNI8VMuq0KUqRgZzkMGf0l8+E7gCGeQA3EP9zEY3LJfT9qQmehmdigRBm0W1Rw6Cw2UFKS1ssfMv8GavyMkkGyMMYVoZoegvsJQWeO0oH3ANdOEJbl0IzGconBti2XrFAoJAOOQopej8IXXf2H6N5FRJ6h1R6PQRMJDglOLyaSeYypnhOJRDuYijT1gW2wuBI/GtmtO7yfrnBa102onfXSmhqWHBy3voqG+DshkewXHmrQipbES0EYp7rNte7gEEMTN0oaJfjeHt0K X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(36860700013)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Aug 2024 16:47:54.9005 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e46349cc-90ac-41a6-747b-08dcc5eed53b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3A.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5705 The AGX Orin module boards contain common nodes that can be moved to the included module dtsi. This eliminates redundancy within the files and reduces lines of code. Data from tegra234-p3701-0000 and tegra234-p3701-0008 that is common is now in tegra234-p3701.dtsi. Signed-off-by: Dara Stotland --- .../boot/dts/nvidia/tegra234-p3701-0000.dtsi | 83 ----------------- .../boot/dts/nvidia/tegra234-p3701-0008.dtsi | 89 ------------------- .../arm64/boot/dts/nvidia/tegra234-p3701.dtsi | 85 ++++++++++++++++++ 3 files changed, 85 insertions(+), 172 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi index cb792041fc62..ea846b879a21 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi @@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 -#include "tegra234.dtsi" #include "tegra234-p3701.dtsi" / { @@ -8,34 +7,6 @@ compatible = "nvidia,p3701-0000", "nvidia,tegra234"; bus@0 { - i2c@3160000 { - status = "okay"; - - eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - - label = "module"; - vcc-supply = <&vdd_1v8_hs>; - address-width = <8>; - pagesize = <8>; - size = <256>; - read-only; - }; - }; - - spi@3270000 { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <102000000>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - }; - }; - mmc@3400000 { status = "okay"; bus-width = <4>; @@ -43,12 +14,6 @@ disable-wp; }; - mmc@3460000 { - status = "okay"; - bus-width = <8>; - non-removable; - }; - padctl@3520000 { vclamp-usb-supply = <&vdd_1v8_ao>; avdd-usb-supply = <&vdd_3v3_ao>; @@ -72,54 +37,6 @@ }; }; - rtc@c2a0000 { - status = "okay"; - }; - - pmc@c360000 { - nvidia,invert-interrupt; - }; - }; - - vdd_5v0_sys: regulator-vdd-5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "VIN_SYS_5V0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - }; - - vdd_1v8_ls: regulator-vdd-1v8-ls { - compatible = "regulator-fixed"; - regulator-name = "VDD_1V8_LS"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vdd_1v8_hs: regulator-vdd-1v8-hs { - compatible = "regulator-fixed"; - regulator-name = "VDD_1V8_HS"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vdd_1v8_ao: regulator-vdd-1v8-ao { - compatible = "regulator-fixed"; - regulator-name = "VDD_1V8_AO"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vdd_3v3_ao: regulator-vdd-3v3-ao { - compatible = "regulator-fixed"; - regulator-name = "VDD_3V3_AO"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; }; vdd_3v3_pcie: regulator-vdd-3v3-pcie { diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi index 62c4fdad0b60..9218ea8d43e6 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3701-0008.dtsi @@ -1,58 +1,10 @@ // SPDX-License-Identifier: GPL-2.0 -#include "tegra234.dtsi" #include "tegra234-p3701.dtsi" / { compatible = "nvidia,p3701-0008", "nvidia,tegra234"; - bus@0 { - i2c@3160000 { - status = "okay"; - - eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - label = "module"; - vcc-supply = <&vdd_1v8_hs>; - address-width = <8>; - pagesize = <8>; - size = <256>; - read-only; - }; - }; - - spi@3270000 { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <102000000>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - }; - }; - - mmc@3460000 { - status = "okay"; - bus-width = <8>; - non-removable; - }; - - i2c@c240000 { - status = "okay"; - }; - - rtc@c2a0000 { - status = "okay"; - }; - - pmc@c360000 { - nvidia,invert-interrupt; - }; - }; - bpmp { i2c { status = "okay"; @@ -68,45 +20,4 @@ status = "okay"; }; }; - - vdd_1v8_ao: regulator-vdd-1v8-ao { - compatible = "regulator-fixed"; - regulator-name = "VDD_1V8_AO"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vdd_1v8_hs: regulator-vdd-1v8-hs { - compatible = "regulator-fixed"; - regulator-name = "VDD_1V8_HS"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vdd_1v8_ls: regulator-vdd-1v8-ls { - compatible = "regulator-fixed"; - regulator-name = "VDD_1V8_LS"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vdd_3v3_ao: regulator-vdd-3v3-ao { - compatible = "regulator-fixed"; - regulator-name = "vdd-AO-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_5v0_sys: regulator-vdd-5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "VIN_SYS_5V0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi index 320c8e9b06b4..18bd4ccb6b77 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi @@ -1,5 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 +#include "tegra234.dtsi" + / { compatible = "nvidia,p3701", "nvidia,tegra234"; @@ -45,6 +47,40 @@ }; }; + i2c@3160000 { + status = "okay"; + + eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + + label = "module"; + vcc-supply = <&vdd_1v8_hs>; + address-width = <8>; + pagesize = <8>; + size = <256>; + read-only; + }; + }; + + spi@3270000 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <102000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; + }; + + mmc@3460000 { + status = "okay"; + bus-width = <8>; + non-removable; + }; + i2c@c240000 { status = "okay"; @@ -97,5 +133,54 @@ }; }; }; + + rtc@c2a0000 { + status = "okay"; + }; + + pmc@c360000 { + nvidia,invert-interrupt; + }; + }; + + vdd_1v8_ao: regulator-vdd-1v8-ao { + compatible = "regulator-fixed"; + regulator-name = "VDD_1V8_AO"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vdd_1v8_hs: regulator-vdd-1v8-hs { + compatible = "regulator-fixed"; + regulator-name = "VDD_1V8_HS"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vdd_1v8_ls: regulator-vdd-1v8-ls { + compatible = "regulator-fixed"; + regulator-name = "VDD_1V8_LS"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vdd_3v3_ao: regulator-vdd-3v3-ao { + compatible = "regulator-fixed"; + regulator-name = "VDD_3V3_AO"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vdd_5v0_sys: regulator-vdd-5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "VIN_SYS_5V0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; }; };