Message ID | 20240816184348.2072535-3-vedantd@nvidia.com |
---|---|
State | Accepted |
Headers | show
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Tegra234 PCIe-EP definitions
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expand
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diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767.dtsi index 6d64a24fa251..7a60f3a4550e 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234-p3768-0000+p3767.dtsi @@ -172,6 +172,18 @@ pcie@14160000 { phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3"; }; + pcie-ep@14160000 {/* C4 - End Point */ + phys = <&p2u_hsio_4>, <&p2u_hsio_5>, <&p2u_hsio_6>, + <&p2u_hsio_7>; + phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3"; + reset-gpios = <&gpio + TEGRA234_MAIN_GPIO(L, 1) + GPIO_ACTIVE_LOW>; + nvidia,refclk-select-gpios = <&gpio_aon + TEGRA234_AON_GPIO(AA, 4) + GPIO_ACTIVE_HIGH>; + }; + /* C7 - M.2 Key-M */ pcie@141e0000 { status = "okay";
Add implementation details for Orin NX/Nano PCIe EP on C4. Signed-off-by: Vedant Deshpande <vedantd@nvidia.com> --- .../boot/dts/nvidia/tegra234-p3768-0000+p3767.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)