diff mbox series

gpu: host1x: Skip reset assert on Tegra186

Message ID 20240222010517.1573931-1-cyndis@kapsi.fi
State Accepted
Headers show
Series gpu: host1x: Skip reset assert on Tegra186 | expand

Commit Message

Mikko Perttunen Feb. 22, 2024, 1:05 a.m. UTC
From: Mikko Perttunen <mperttunen@nvidia.com>

On Tegra186, secure world applications may need to access host1x
during suspend/resume, and rely on the kernel to keep Host1x out
of reset during the suspend cycle. As such, as a quirk,
skip asserting Host1x's reset on Tegra186.

We don't need to keep the clocks enabled, as BPMP ensures the clock
stays on while Host1x is being used. On newer SoC's, the reset line
is inaccessible, so there is no need for the quirk.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
 drivers/gpu/host1x/dev.c | 15 +++++++++------
 drivers/gpu/host1x/dev.h |  6 ++++++
 2 files changed, 15 insertions(+), 6 deletions(-)

Comments

Thierry Reding Feb. 22, 2024, 6:06 p.m. UTC | #1
On Thu Feb 22, 2024 at 2:05 AM CET, Mikko Perttunen wrote:
> From: Mikko Perttunen <mperttunen@nvidia.com>
>
> On Tegra186, secure world applications may need to access host1x
> during suspend/resume, and rely on the kernel to keep Host1x out
> of reset during the suspend cycle. As such, as a quirk,
> skip asserting Host1x's reset on Tegra186.
>
> We don't need to keep the clocks enabled, as BPMP ensures the clock
> stays on while Host1x is being used. On newer SoC's, the reset line
> is inaccessible, so there is no need for the quirk.
>
> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
> ---
>  drivers/gpu/host1x/dev.c | 15 +++++++++------
>  drivers/gpu/host1x/dev.h |  6 ++++++
>  2 files changed, 15 insertions(+), 6 deletions(-)

Applied to drm-misc-fixes, though I added the Fixes: tag that Jon
mentioned in reply to v1 of this as well as his Reviewed-by and
Tested-by as well, since this is pretty much the same patch except
for the comments.

Thanks,
Thierry
Mikko Perttunen Feb. 24, 2024, 6:02 a.m. UTC | #2
On 2/23/24 03:06, Thierry Reding wrote:
> On Thu Feb 22, 2024 at 2:05 AM CET, Mikko Perttunen wrote:
>> From: Mikko Perttunen <mperttunen@nvidia.com>
>>
>> On Tegra186, secure world applications may need to access host1x
>> during suspend/resume, and rely on the kernel to keep Host1x out
>> of reset during the suspend cycle. As such, as a quirk,
>> skip asserting Host1x's reset on Tegra186.
>>
>> We don't need to keep the clocks enabled, as BPMP ensures the clock
>> stays on while Host1x is being used. On newer SoC's, the reset line
>> is inaccessible, so there is no need for the quirk.
>>
>> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
>> ---
>>   drivers/gpu/host1x/dev.c | 15 +++++++++------
>>   drivers/gpu/host1x/dev.h |  6 ++++++
>>   2 files changed, 15 insertions(+), 6 deletions(-)
> 
> Applied to drm-misc-fixes, though I added the Fixes: tag that Jon
> mentioned in reply to v1 of this as well as his Reviewed-by and
> Tested-by as well, since this is pretty much the same patch except
> for the comments.

Thanks. Sorry for messing it up :p

Mikko

> 
> Thanks,
> Thierry
diff mbox series

Patch

diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index 42fd504abbcd..89983d7d73ca 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -169,6 +169,7 @@  static const struct host1x_info host1x06_info = {
 	.num_sid_entries = ARRAY_SIZE(tegra186_sid_table),
 	.sid_table = tegra186_sid_table,
 	.reserve_vblank_syncpts = false,
+	.skip_reset_assert = true,
 };
 
 static const struct host1x_sid_entry tegra194_sid_table[] = {
@@ -680,13 +681,15 @@  static int __maybe_unused host1x_runtime_suspend(struct device *dev)
 	host1x_intr_stop(host);
 	host1x_syncpt_save(host);
 
-	err = reset_control_bulk_assert(host->nresets, host->resets);
-	if (err) {
-		dev_err(dev, "failed to assert reset: %d\n", err);
-		goto resume_host1x;
-	}
+	if (!host->info->skip_reset_assert) {
+		err = reset_control_bulk_assert(host->nresets, host->resets);
+		if (err) {
+			dev_err(dev, "failed to assert reset: %d\n", err);
+			goto resume_host1x;
+		}
 
-	usleep_range(1000, 2000);
+		usleep_range(1000, 2000);
+	}
 
 	clk_disable_unprepare(host->clk);
 	reset_control_bulk_release(host->nresets, host->resets);
diff --git a/drivers/gpu/host1x/dev.h b/drivers/gpu/host1x/dev.h
index c8e302de7625..6143c2a61d70 100644
--- a/drivers/gpu/host1x/dev.h
+++ b/drivers/gpu/host1x/dev.h
@@ -116,6 +116,12 @@  struct host1x_info {
 	 * the display driver disables VBLANK increments.
 	 */
 	bool reserve_vblank_syncpts;
+	/*
+	 * On T186, secure world applications may require access to host1x
+	 * during suspend/resume. To allow this, we need to leave host1x
+	 * not in reset.
+	 */
+	bool skip_reset_assert;
 };
 
 struct host1x {