diff mbox series

pinctrl: tegra: Display pin function in pinconf-groups

Message ID 20230929122101.466266-1-thierry.reding@gmail.com
State Handled Elsewhere
Headers show
Series pinctrl: tegra: Display pin function in pinconf-groups | expand

Commit Message

Thierry Reding Sept. 29, 2023, 12:21 p.m. UTC 
From: Thierry Reding <treding@nvidia.com>

The function that a pin is muxed to can be read from the top-level
pinctrl-maps debugfs file. However, this only reflects the values that
were specified in device tree, so they will only show deviations from
the hardware default setting. Display the current pinmux setting in the
per-controller pinconf-groups debugfs file along with the rest of the
per-pin configuration settings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/pinctrl/tegra/pinctrl-tegra.c | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Luca Ceresoli Oct. 2, 2023, 8:25 a.m. UTC | #1 
Hello Thierry,

On Fri, 29 Sep 2023 14:21:01 +0200
Thierry Reding <thierry.reding@gmail.com> wrote:

> From: Thierry Reding <treding@nvidia.com>
> 
> The function that a pin is muxed to can be read from the top-level
> pinctrl-maps debugfs file. However, this only reflects the values that
> were specified in device tree, so they will only show deviations from
> the hardware default setting. Display the current pinmux setting in the
> per-controller pinconf-groups debugfs file along with the rest of the
> per-pin configuration settings.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>

[On Tegra20]
Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Linus Walleij Nov. 6, 2023, 1:25 p.m. UTC | #2 
On Fri, Sep 29, 2023 at 2:21 PM Thierry Reding <thierry.reding@gmail.com> wrote:

> From: Thierry Reding <treding@nvidia.com>
>
> The function that a pin is muxed to can be read from the top-level
> pinctrl-maps debugfs file. However, this only reflects the values that
> were specified in device tree, so they will only show deviations from
> the hardware default setting. Display the current pinmux setting in the
> per-controller pinconf-groups debugfs file along with the rest of the
> per-pin configuration settings.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>

Patch queued for v6.8, will appear in next when the v6.7-rc1 is released.

Yours,
Linus Walleij
diff mbox series

Patch

diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
index a4002b430f0a..c9fd3910bb3b 100644
--- a/drivers/pinctrl/tegra/pinctrl-tegra.c
+++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
@@ -639,6 +639,14 @@  static void tegra_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
 		seq_printf(s, "\n\t%s=%u",
 			   strip_prefix(cfg_params[i].property), val);
 	}
+
+	if (g->mux_reg >= 0) {
+		/* read pinmux function and dump to seq_file */
+		val = pmx_readl(pmx, g->mux_bank, g->mux_reg);
+		val = g->funcs[(val >> g->mux_bit) & 0x3];
+
+		seq_printf(s, "\n\tfunction=%s", pmx->functions[val].name);
+	}
 }
 
 static void tegra_pinconf_config_dbg_show(struct pinctrl_dev *pctldev,