Message ID | 20230609131711.3826912-1-thierry.reding@gmail.com |
---|---|
State | Accepted |
Headers | show |
Series | [1/4] arm64: tegra: Add Tegra234 thermal support | expand |
On 09/06/2023 14:17, Thierry Reding wrote: > From: Thierry Reding <treding@nvidia.com> > > Add device tree node for the BPMP thermal node on Tegra234 and add > thermal zone definitions. > > Signed-off-by: Thierry Reding <treding@nvidia.com> > --- > arch/arm64/boot/dts/nvidia/tegra234.dtsi | 53 +++++++++++++++++++ > .../thermal/tegra234-bpmp-thermal.h | 19 +++++++ > 2 files changed, 72 insertions(+) > create mode 100644 include/dt-bindings/thermal/tegra234-bpmp-thermal.h > > diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi > index 6e66f41695c0..c17abe054dab 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi > @@ -8,6 +8,7 @@ > #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> > #include <dt-bindings/power/tegra234-powergate.h> > #include <dt-bindings/reset/tegra234-reset.h> > +#include <dt-bindings/thermal/tegra234-bpmp-thermal.h> > > / { > compatible = "nvidia,tegra234"; > @@ -3163,6 +3164,11 @@ bpmp_i2c: i2c { > #address-cells = <1>; > #size-cells = <0>; > }; > + > + bpmp_thermal: thermal { > + compatible = "nvidia,tegra186-bpmp-thermal"; > + #thermal-sensor-cells = <1>; > + }; > }; > > cpus { > @@ -3653,6 +3659,53 @@ sound { > <&bpmp TEGRA234_CLK_PLLA_OUT0>; > }; > > + thermal-zones { > + cpu-thermal { > + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CPU>; > + status = "disabled"; > + }; > + > + gpu-thermal { > + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_GPU>; > + status = "disabled"; > + }; > + > + cv0-thermal { > + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV0>; > + status = "disabled"; > + }; > + > + cv1-thermal { > + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV1>; > + status = "disabled"; > + }; > + > + cv2-thermal { > + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV2>; > + status = "disabled"; > + }; > + > + soc0-thermal { > + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC0>; > + status = "disabled"; > + }; > + > + soc1-thermal { > + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC1>; > + status = "disabled"; > + }; > + > + soc2-thermal { > + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC2>; > + status = "disabled"; > + }; > + > + tj-thermal { > + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_TJ_MAX>; > + status = "disabled"; > + }; > + }; > + > timer { > compatible = "arm,armv8-timer"; > interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > diff --git a/include/dt-bindings/thermal/tegra234-bpmp-thermal.h b/include/dt-bindings/thermal/tegra234-bpmp-thermal.h > new file mode 100644 > index 000000000000..934787950932 > --- /dev/null > +++ b/include/dt-bindings/thermal/tegra234-bpmp-thermal.h > @@ -0,0 +1,19 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * This header provides constants for binding nvidia,tegra234-bpmp-thermal. > + */ > + > +#ifndef _DT_BINDINGS_THERMAL_TEGRA234_BPMP_THERMAL_H > +#define _DT_BINDINGS_THERMAL_TEGRA234_BPMP_THERMAL_H > + > +#define TEGRA234_BPMP_THERMAL_ZONE_CPU 0 > +#define TEGRA234_BPMP_THERMAL_ZONE_GPU 1 > +#define TEGRA234_BPMP_THERMAL_ZONE_CV0 2 > +#define TEGRA234_BPMP_THERMAL_ZONE_CV1 3 > +#define TEGRA234_BPMP_THERMAL_ZONE_CV2 4 > +#define TEGRA234_BPMP_THERMAL_ZONE_SOC0 5 > +#define TEGRA234_BPMP_THERMAL_ZONE_SOC1 6 > +#define TEGRA234_BPMP_THERMAL_ZONE_SOC2 7 > +#define TEGRA234_BPMP_THERMAL_ZONE_TJ_MAX 8 > + > +#endif Looks good to me. For this series ... Acked-by: Jon Hunter <jonathanh@nvidia.com> Jon
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi index 6e66f41695c0..c17abe054dab 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> #include <dt-bindings/power/tegra234-powergate.h> #include <dt-bindings/reset/tegra234-reset.h> +#include <dt-bindings/thermal/tegra234-bpmp-thermal.h> / { compatible = "nvidia,tegra234"; @@ -3163,6 +3164,11 @@ bpmp_i2c: i2c { #address-cells = <1>; #size-cells = <0>; }; + + bpmp_thermal: thermal { + compatible = "nvidia,tegra186-bpmp-thermal"; + #thermal-sensor-cells = <1>; + }; }; cpus { @@ -3653,6 +3659,53 @@ sound { <&bpmp TEGRA234_CLK_PLLA_OUT0>; }; + thermal-zones { + cpu-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CPU>; + status = "disabled"; + }; + + gpu-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_GPU>; + status = "disabled"; + }; + + cv0-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV0>; + status = "disabled"; + }; + + cv1-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV1>; + status = "disabled"; + }; + + cv2-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_CV2>; + status = "disabled"; + }; + + soc0-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC0>; + status = "disabled"; + }; + + soc1-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC1>; + status = "disabled"; + }; + + soc2-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_SOC2>; + status = "disabled"; + }; + + tj-thermal { + thermal-sensors = <&{/bpmp/thermal} TEGRA234_BPMP_THERMAL_ZONE_TJ_MAX>; + status = "disabled"; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, diff --git a/include/dt-bindings/thermal/tegra234-bpmp-thermal.h b/include/dt-bindings/thermal/tegra234-bpmp-thermal.h new file mode 100644 index 000000000000..934787950932 --- /dev/null +++ b/include/dt-bindings/thermal/tegra234-bpmp-thermal.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides constants for binding nvidia,tegra234-bpmp-thermal. + */ + +#ifndef _DT_BINDINGS_THERMAL_TEGRA234_BPMP_THERMAL_H +#define _DT_BINDINGS_THERMAL_TEGRA234_BPMP_THERMAL_H + +#define TEGRA234_BPMP_THERMAL_ZONE_CPU 0 +#define TEGRA234_BPMP_THERMAL_ZONE_GPU 1 +#define TEGRA234_BPMP_THERMAL_ZONE_CV0 2 +#define TEGRA234_BPMP_THERMAL_ZONE_CV1 3 +#define TEGRA234_BPMP_THERMAL_ZONE_CV2 4 +#define TEGRA234_BPMP_THERMAL_ZONE_SOC0 5 +#define TEGRA234_BPMP_THERMAL_ZONE_SOC1 6 +#define TEGRA234_BPMP_THERMAL_ZONE_SOC2 7 +#define TEGRA234_BPMP_THERMAL_ZONE_TJ_MAX 8 + +#endif