| Message ID | 20201125192234.2270-1-vidyas@nvidia.com |
|---|---|
| State | Deferred |
| Headers | show |
| Series | PCI: tegra: Move "dbi" accesses to post common DWC initialization | expand |
On Thu, Nov 26, 2020 at 12:52:34AM +0530, Vidya Sagar wrote: > commit a0fd361db8e5 ("PCI: dwc: Move "dbi", "dbi2", and "addr_space" > resource setup into common code") moved the code that sets up dbi_base > to DWC common code thereby creating a requirement to not access the "dbi" > region before calling common DWC initialization code. But, Tegra194 > already had some code that programs some of the "dbi" registers resulting > in system crash. This patch addresses that issue by refactoring the code > to have accesses to the "dbi" region only after common DWC initialization. > > Fixes: a0fd361db8e5 ("PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into common code") > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > --- > drivers/pci/controller/dwc/pcie-tegra194.c | 19 ++++++++++--------- > 1 file changed, 10 insertions(+), 9 deletions(-) This, together with your other patch fixes Tegra194 PCI on top of next-20201126 for me, so: Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com>
On Thu, 26 Nov 2020 00:52:34 +0530, Vidya Sagar wrote: > commit a0fd361db8e5 ("PCI: dwc: Move "dbi", "dbi2", and "addr_space" > resource setup into common code") moved the code that sets up dbi_base > to DWC common code thereby creating a requirement to not access the "dbi" > region before calling common DWC initialization code. But, Tegra194 > already had some code that programs some of the "dbi" registers resulting > in system crash. This patch addresses that issue by refactoring the code > to have accesses to the "dbi" region only after common DWC initialization. Applied to pci/dwc, thanks! [1/1] PCI: tegra: Move "dbi" accesses to post common DWC initialization https://git.kernel.org/lpieralisi/pci/c/369b868f4a Thanks, Lorenzo
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index ac2225175087..648e731bccfa 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -859,6 +859,16 @@ static void tegra_pcie_prepare_host(struct pcie_port *pp) struct tegra_pcie_dw *pcie = to_tegra_pcie(pci); u32 val; + if (!pcie->pcie_cap_base) + pcie->pcie_cap_base = dw_pcie_find_capability(&pcie->pci, + PCI_CAP_ID_EXP); + + /* Disable ASPM-L1SS advertisement if there is no CLKREQ routing */ + if (!pcie->supports_clkreq) { + disable_aspm_l11(pcie); + disable_aspm_l12(pcie); + } + val = dw_pcie_readl_dbi(pci, PCI_IO_BASE); val &= ~(IO_BASE_IO_DECODE | IO_BASE_IO_DECODE_BIT8); dw_pcie_writel_dbi(pci, PCI_IO_BASE, val); @@ -1389,15 +1399,6 @@ static int tegra_pcie_config_controller(struct tegra_pcie_dw *pcie, reset_control_deassert(pcie->core_rst); - pcie->pcie_cap_base = dw_pcie_find_capability(&pcie->pci, - PCI_CAP_ID_EXP); - - /* Disable ASPM-L1SS advertisement as there is no CLKREQ routing */ - if (!pcie->supports_clkreq) { - disable_aspm_l11(pcie); - disable_aspm_l12(pcie); - } - return ret; fail_phy:
commit a0fd361db8e5 ("PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into common code") moved the code that sets up dbi_base to DWC common code thereby creating a requirement to not access the "dbi" region before calling common DWC initialization code. But, Tegra194 already had some code that programs some of the "dbi" registers resulting in system crash. This patch addresses that issue by refactoring the code to have accesses to the "dbi" region only after common DWC initialization. Fixes: a0fd361db8e5 ("PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into common code") Signed-off-by: Vidya Sagar <vidyas@nvidia.com> --- drivers/pci/controller/dwc/pcie-tegra194.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-)