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[1/3] arm64: tegra: Fix AGIC register range

Message ID 20190620081702.17209-2-jonathanh@nvidia.com
State Accepted
Headers show
Series arm64: tegra: A few device-tree fixes | expand

Commit Message

Jon Hunter June 20, 2019, 8:17 a.m. UTC
The Tegra AGIC interrupt controller is an ARM GIC400 interrupt
controller. Per the ARM GIC device-tree binding, the first address
region is for the GIC distributor registers and the second address
region is for the GIC CPU interface registers. The address space for
the distributor registers is 4kB, but currently this is incorrectly
defined as 8kB for the Tegra AGIC and overlaps with the CPU interface
registers. Correct the address space for the distributor to be 4kB.

Cc: stable@vger.kernel.org
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra210.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Thierry Reding June 20, 2019, 9:13 a.m. UTC | #1
On Thu, Jun 20, 2019 at 09:17:00AM +0100, Jon Hunter wrote:
> The Tegra AGIC interrupt controller is an ARM GIC400 interrupt
> controller. Per the ARM GIC device-tree binding, the first address
> region is for the GIC distributor registers and the second address
> region is for the GIC CPU interface registers. The address space for
> the distributor registers is 4kB, but currently this is incorrectly
> defined as 8kB for the Tegra AGIC and overlaps with the CPU interface
> registers. Correct the address space for the distributor to be 4kB.
> 
> Cc: stable@vger.kernel.org
> Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
> ---
>  arch/arm64/boot/dts/nvidia/tegra210.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied to for-5.3/arm64/dt, though I also added the following Fixes:
line:

Fixes: bcdbde433542 ("arm64: tegra: Add AGIC node for Tegra210")

Thanks,
Thierry
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index edf27fe2f10e..ec762b3455b4 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -1258,7 +1258,7 @@ 
 			compatible = "nvidia,tegra210-agic";
 			#interrupt-cells = <3>;
 			interrupt-controller;
-			reg = <0x702f9000 0x2000>,
+			reg = <0x702f9000 0x1000>,
 			      <0x702fa000 0x2000>;
 			interrupts = <GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 			clocks = <&tegra_car TEGRA210_CLK_APE>;