From patchwork Mon Dec 10 09:43:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Zhang X-Patchwork-Id: 1010342 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="mz64UmG3"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43CypK3VJ2z9s2P for ; Mon, 10 Dec 2018 20:44:25 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726664AbeLJJoZ (ORCPT ); Mon, 10 Dec 2018 04:44:25 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:7715 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726614AbeLJJoZ (ORCPT ); Mon, 10 Dec 2018 04:44:25 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 10 Dec 2018 01:44:21 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 10 Dec 2018 01:44:24 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 10 Dec 2018 01:44:24 -0800 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 10 Dec 2018 09:44:23 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Mon, 10 Dec 2018 09:44:23 +0000 Received: from localhost.localdomain (Not Verified[10.19.225.143]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 10 Dec 2018 01:44:23 -0800 From: Mark Zhang To: , , CC: Mark Zhang Subject: [PATCH 3/5] arm64: tegra: Add gpio-keys nodes for Darcy Date: Mon, 10 Dec 2018 17:43:56 +0800 Message-ID: <20181210094358.3241-4-markz@nvidia.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181210094358.3241-1-markz@nvidia.com> References: <20181210094358.3241-1-markz@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1544435061; bh=ekfKieOKrz4i7ZuZV8uBnjfcFCkshjosvrQNHN6GH4I=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:X-NVConfidentiality: Content-Transfer-Encoding:Content-Type; b=mz64UmG3abS2v55dFFL7qHAeSrzLMsCuHAtKdnI6dJ3hrseMp0nnpZ0cir6mgTfuU VDLMD3LEFf90uKN59WBiZBLdhCyMVQ/82QHuwoMztzjQshdbVPutBqtnvp0ZSPnZex U19mITmqQQMBWJQuXoQY6O7fk9irH87++ec8DzzX9fKq4s6vD+QTLlLZbWzICmXSLd wte5ZezYzAg6C1vTGJywtRuqCd9eJlvmsfYZNlYOdcwJ5fS5JUauwvZhqLbfCCFbGB 0CfnH8zdiDSSRxFGsRu9E4nCEYB6B97VoTizbS+ey7y4ZxNRyb8ZlXKYplScqlM90e rnBLEqNUH6ysA== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add gpio-keys nodes for the power button. Signed-off-by: Mark Zhang --- arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi index ac52286ab9ab..1053f18cc4ae 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 +#include #include "tegra210.dtsi" / { @@ -52,6 +53,20 @@ }; }; + gpio-keys { + compatible = "gpio-keys"; + gpio-keys,name = "gpio-keys"; + status = "okay"; + + power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; + linux,code = ; + wakeup-source; + debounce-interval = <30>; + }; + }; + cpus { cpu@0 { enable-method = "psci";