From patchwork Mon Jun 27 09:02:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joseph Lo X-Patchwork-Id: 640866 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rdNJl2l0Zz9sBm for ; Mon, 27 Jun 2016 19:03:35 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752115AbcF0JDA (ORCPT ); Mon, 27 Jun 2016 05:03:00 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:15402 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752093AbcF0JC5 (ORCPT ); Mon, 27 Jun 2016 05:02:57 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Mon, 27 Jun 2016 02:02:24 -0700 Received: from HQMAIL101.nvidia.com ([172.20.187.10]) by hqnvupgp08.nvidia.com (PGP Universal service); Mon, 27 Jun 2016 02:01:48 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 27 Jun 2016 02:01:48 -0700 Received: from HQMAIL108.nvidia.com (172.18.146.13) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Mon, 27 Jun 2016 09:02:56 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server id 15.0.1130.7 via Frontend Transport; Mon, 27 Jun 2016 09:02:55 +0000 Received: from jlo-ubuntu64.nvidia.com (Not Verified[10.19.108.111]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 5, 8150) id ; Mon, 27 Jun 2016 02:02:55 -0700 From: Joseph Lo To: Stephen Warren , Thierry Reding , Alexandre Courbot CC: , , Rob Herring , Mark Rutland , Peter De Schrijver , Matthew Longnecker , , Jassi Brar , , Catalin Marinas , Will Deacon , Joseph Lo Subject: [PATCH 09/10] arm64: dts: tegra: Add NVIDIA Tegra186 P3310 main board support Date: Mon, 27 Jun 2016 17:02:47 +0800 Message-ID: <20160627090248.23621-10-josephl@nvidia.com> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20160627090248.23621-1-josephl@nvidia.com> References: <20160627090248.23621-1-josephl@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add NVIDIA Tegra186 P3310 main board support, which is a chip module with DRAM, nonvolatile storage, WiFi, ethernet and PMIC chips on it. It also needs an IO board and hooks on it to represent as an application platform. Signed-off-by: Joseph Lo --- arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 30 ++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi new file mode 100644 index 000000000000..5258ec0d6eef --- /dev/null +++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi @@ -0,0 +1,30 @@ +#include "tegra186.dtsi" + +/ { + model = "NVIDIA Tegra186 P3310 main Board"; + compatible = "nvidia,p3301", "nvidia,tegra186"; + + aliases { + serial0 = &uarta; + }; + + chosen { + bootargs = "earlycon console=ttyS0,115200n8"; + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x80000000 0x2 0x00000000>; + }; + + serial@03100000 { + // HACK: before clk driver ready + clock-frequency = <408000000>; + status = "okay"; + }; + + bpmp@d0000000 { + status = "okay"; + }; +};