From patchwork Thu Jun 23 07:39:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Courbot X-Patchwork-Id: 639533 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3rZtg64lCRz9sDk for ; Thu, 23 Jun 2016 17:40:50 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751636AbcFWHk1 (ORCPT ); Thu, 23 Jun 2016 03:40:27 -0400 Received: from nat-hk.nvidia.com ([203.18.50.4]:57920 "EHLO hkmmgate101.nvidia.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751480AbcFWHk0 (ORCPT ); Thu, 23 Jun 2016 03:40:26 -0400 Received: from hkpgpgate102.nvidia.com (Not Verified[10.18.92.9]) by hkmmgate101.nvidia.com id ; Thu, 23 Jun 2016 15:40:25 +0800 Received: from HKMAIL104.nvidia.com ([10.18.67.137]) by hkpgpgate102.nvidia.com (PGP Universal service); Thu, 23 Jun 2016 00:40:22 -0700 X-PGP-Universal: processed; by hkpgpgate102.nvidia.com on Thu, 23 Jun 2016 00:40:22 -0700 Received: from HQMAIL106.nvidia.com (172.18.146.12) by HKMAIL104.nvidia.com (10.18.16.13) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Thu, 23 Jun 2016 07:40:19 +0000 Received: from percival.nvidia.com (172.20.13.39) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1130.7 via Frontend Transport; Thu, 23 Jun 2016 07:40:17 +0000 From: Alexandre Courbot To: Liam Girdwood , Mark Brown , Rob Herring , Mark Rutland , Stephen Warren , Thierry Reding CC: , , , , Alexandre Courbot Subject: [PATCH v2 2/2] arm64: tegra: Add VDD_GPU regulator to Jetson TX1 Date: Thu, 23 Jun 2016 16:39:45 +0900 Message-ID: <20160623073945.11642-2-acourbot@nvidia.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20160623073945.11642-1-acourbot@nvidia.com> References: <20160623073945.11642-1-acourbot@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add the VDD_GPU regulator (a GPIO-enabled PWM regulator) to the Jetson TX1 board. This addition allows the GPU to be used provided the bootloader properly enabled the GPU node. Signed-off-by: Alexandre Courbot --- Changes since v1: - Include this patch into the series to make sure it is merged after 1/2, otherwise Jetson TX1 will lock when trying to enable the regulator. arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts index 983775e637a4..cc9fb5207f9d 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts @@ -25,6 +25,10 @@ }; }; + gpu@57000000 { + vdd-supply = <&vdd_gpu>; + }; + i2c@7000c400 { backlight: backlight@2c { compatible = "ti,lp8557"; @@ -51,4 +55,18 @@ }; }; }; + + regulators { + vdd_gpu: regulator@100 { + compatible = "pwm-regulator"; + reg = <100>; + pwms = <&pwm 1 4880>; + regulator-name = "VDD_GPU"; + regulator-min-microvolt = <710000>; + regulator-max-microvolt = <1320000>; + enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>; + regulator-ramp-delay = <80>; + regulator-enable-ramp-delay = <1000>; + }; + }; };