From patchwork Wed Apr 6 07:54:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hunter Laux X-Patchwork-Id: 606877 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qfyhN4v1Hz9t5c for ; Wed, 6 Apr 2016 17:55:48 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=GQoaGuR7; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754272AbcDFHzr (ORCPT ); Wed, 6 Apr 2016 03:55:47 -0400 Received: from mail-pa0-f65.google.com ([209.85.220.65]:35717 "EHLO mail-pa0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753830AbcDFHzq (ORCPT ); Wed, 6 Apr 2016 03:55:46 -0400 Received: by mail-pa0-f65.google.com with SMTP id zy2so3380490pac.2 for ; Wed, 06 Apr 2016 00:55:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=2SX1DLk2M17XeGoJfcDyJfUhURyN4Wa7EcXLZC0czAQ=; b=GQoaGuR7hrjc8P7zuFRq30ZOU36R3yG1Q1isSe5lH/cc0gBDwgvChb8sDpWySFjgjZ O/3Ez1mDBp+KPEyI4kVquwE2MEQhHDu5ly784tCmwE6xUvhFnM6Rkr3eoQyi8YaCOkEd tFCoSPDy56rHE2UdqImfTilOq8yjqwzzsYc3dOJBzf6gytdfLqdkHY8hEwBlThPaRtvz thyZ/MdcuX/8Ao6FVA1q3+bxQTUBIkDjVoxyevOg3j1ZrAYi+AATuh5r4ZnISgy+jqXx X3CmM8rRpNfc7EG8oSgeAgMSUXuhxcEV6MgIlCVhPpLacuvkH6amy8WTZnhZU6ppplaW 2THQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=2SX1DLk2M17XeGoJfcDyJfUhURyN4Wa7EcXLZC0czAQ=; b=DfH3tmqUtcQN4lapkDsOy63HfX0RKADJwWoU2Pub62ehlrJb+Ny7o/cQFXs5kWp0MB t0cM8VHGS0KdndMjuuSqGeJNfEOYSmj0+c1rfeB0lzNEsBfEP6yqan49y/+Kg3QcD6me 4G3aCIibtEnr2nAXDl/hDM0ke+eGq1MESQlo94lBGUnEeIQKE+KaBQ7GcifXCGFLtAdB qBhDUaXnZFP+Ml60Qc6iA8EBhn7Hehph9kyA9A6mTDVW0PZhyoDWnjMamAORrAdgbVcs IU7VrgQvphxsfMKSumO/NvUiNT10n1cSybgV/ycQ9mGXDVR5uUg099Xc8czEf60GVQXO cSaQ== X-Gm-Message-State: AD7BkJKUHPd0dxvMX46g2VhAPVAd4ommglHEKCyHj26o6i+m8JQ9yBTNqUifsU992pC4RA== X-Received: by 10.66.222.202 with SMTP id qo10mr36275617pac.141.1459929345813; Wed, 06 Apr 2016 00:55:45 -0700 (PDT) Received: from gibson ([2600:8802:5200:22c:e998:d547:6be8:927c]) by smtp.gmail.com with ESMTPSA id 27sm2648871pfo.58.2016.04.06.00.55.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Apr 2016 00:55:45 -0700 (PDT) Received: from gibson (localhost [127.0.0.1]) by gibson (8.14.4/8.14.4/Debian-4.1ubuntu1) with ESMTP id u367th23024041; Wed, 6 Apr 2016 00:55:43 -0700 Received: (from hlaux@localhost) by gibson (8.14.4/8.14.4/Submit) id u367tgWL023760; Wed, 6 Apr 2016 00:55:42 -0700 From: Hunter Laux To: Stephen Warren , Thierry Reding , Alexandre Courbot , linux-tegra@vger.kernel.org Cc: Hunter Laux Subject: [PATCH] usb: phy: tegra: Add 38.4MHz clock table entry Date: Wed, 6 Apr 2016 00:54:05 -0700 Message-Id: <1459929245-23449-1-git-send-email-hunterlaux@gmail.com> X-Mailer: git-send-email 1.9.1 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The Tegra210 uses a 38.4MHz OSC. This clock table entry is required to use the ehci phy on the Jetson TX1. The xtal_freq_count is actually a 12 bit value, so it should be a u16 instead of u8. Signed-off-by: Hunter Laux --- drivers/usb/phy/phy-tegra-usb.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c index 5fe4a57..f0431f0 100644 --- a/drivers/usb/phy/phy-tegra-usb.c +++ b/drivers/usb/phy/phy-tegra-usb.c @@ -164,7 +164,7 @@ struct tegra_xtal_freq { u8 enable_delay; u8 stable_count; u8 active_delay; - u8 xtal_freq_count; + u16 xtal_freq_count; u16 debounce; }; @@ -201,6 +201,14 @@ static const struct tegra_xtal_freq tegra_freq_table[] = { .xtal_freq_count = 0xFE, .debounce = 0xFDE8, }, + { + .freq = 38400000, + .enable_delay = 0x00, + .stable_count = 0x00, + .active_delay = 0x18, + .xtal_freq_count = 0x177, + .debounce = 0xBB80, + }, }; static void set_pts(struct tegra_usb_phy *phy, u8 pts_val)