From patchwork Wed Apr 8 19:46:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 459436 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 9DA9B1401DC for ; Thu, 9 Apr 2015 05:46:26 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754019AbbDHTq0 (ORCPT ); Wed, 8 Apr 2015 15:46:26 -0400 Received: from ns.lynxeye.de ([87.118.118.114]:35212 "EHLO lynxeye.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753352AbbDHTqZ (ORCPT ); Wed, 8 Apr 2015 15:46:25 -0400 Received: by lynxeye.de (Postfix, from userid 501) id 8EA4B26C2008; Wed, 8 Apr 2015 21:46:23 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on lynxeye.de X-Spam-Level: X-Spam-Status: No, score=-2.9 required=3.0 tests=ALL_TRUSTED,BAYES_00 autolearn=ham version=3.3.1 Received: from tellur.intern.lynxeye.de (p57B5EC68.dip0.t-ipconnect.de [87.181.236.104]) by lynxeye.de (Postfix) with ESMTPA id 9652C26C2005; Wed, 8 Apr 2015 21:46:19 +0200 (CEST) From: Lucas Stach To: Brian Norris , David Woodhouse , Thierry Reding , Stephen Warren Cc: Rob Herring , Pawel Moll , Mark Rutland , Alexandre Courbot , Boris BREZILLON , Ezequiel Garcia , Stefan Agner , Marcel Ziswiler , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 4/5] ARM: tegra: add Tegra20 NAND flash controller node Date: Wed, 8 Apr 2015 21:46:09 +0200 Message-Id: <1428522370-18035-5-git-send-email-dev@lynxeye.de> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1428522370-18035-1-git-send-email-dev@lynxeye.de> References: <1428522370-18035-1-git-send-email-dev@lynxeye.de> Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add basic controller description to be extended by individual boards. Signed-off-by: Lucas Stach --- arch/arm/boot/dts/tegra20.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index e5527f7..d3c9a38 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -360,6 +360,19 @@ status = "disabled"; }; + nand: nand@70008000 { + compatible = "nvidia,tegra20-nand"; + reg = <0x70008000 0x100>; + interrupts = ; + clocks = <&tegra_car TEGRA20_CLK_NDFLASH>; + clock-names = "nand"; + resets = <&tegra_car 13>; + reset-names = "nand"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + }; + pwm: pwm@7000a000 { compatible = "nvidia,tegra20-pwm"; reg = <0x7000a000 0x100>;