From patchwork Tue Oct 14 17:11:17 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Warren X-Patchwork-Id: 399509 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 22D2D1400A3 for ; Wed, 15 Oct 2014 04:11:28 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755444AbaJNRLS (ORCPT ); Tue, 14 Oct 2014 13:11:18 -0400 Received: from avon.wwwdotorg.org ([70.85.31.133]:52783 "EHLO avon.wwwdotorg.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752580AbaJNRLP (ORCPT ); Tue, 14 Oct 2014 13:11:15 -0400 Received: from severn.wwwdotorg.org (unknown [192.168.65.5]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPS id 65D9E625D; Tue, 14 Oct 2014 11:11:14 -0600 (MDT) Received: from swarren-lx1.nvidia.com (localhost [127.0.0.1]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by severn.wwwdotorg.org (Postfix) with ESMTPSA id 15B6CE40C1; Tue, 14 Oct 2014 11:11:12 -0600 (MDT) From: Stephen Warren To: swarren@wwwdotorg.org Cc: linux-tegra@vger.kernel.org, Stephen Warren Subject: [pinmux scripts PATCH 1/4] Board CSV import: Support all Tegra124 OD pins Date: Tue, 14 Oct 2014 11:11:17 -0600 Message-Id: <1413306680-27330-1-git-send-email-swarren@wwwdotorg.org> X-Mailer: git-send-email 1.9.1 X-NVConfidentiality: public X-Virus-Scanned: clamav-milter 0.98.1 at avon.wwwdotorg.org X-Virus-Status: Clean Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Stephen Warren Complete the list of OD pins in the CSV -> *.board import script for Tegra124. Signed-off-by: Stephen Warren --- csv-to-board-tegra124-xlsx.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/csv-to-board-tegra124-xlsx.py b/csv-to-board-tegra124-xlsx.py index be985c2b83c6..c150fface9d2 100755 --- a/csv-to-board-tegra124-xlsx.py +++ b/csv-to-board-tegra124-xlsx.py @@ -219,9 +219,8 @@ with open(csvfile, newline='') as fh: print('ERROR: %s: MUX CSV %s not in SOC F0..3 %s' % (ball_name, mux, repr(gpio_pin.funcs)), file=sys.stderr) sys.exit(1) - if ball_name.startswith('ddc_'): + if ball_name in ('reset_out_n', 'owr', 'hdmi_int', 'ddc_scl', 'ddc_sda'): # These balls' pad type is always OD, so we don't need to set it - # FIXME: There are a few other OD type pads to check for # FIXME: The SoC data structure should tell us the pad type instead of hard-coding it od = False