From patchwork Tue Feb 4 00:17:33 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: achew@nvidia.com X-Patchwork-Id: 316409 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id D52912C0091 for ; Tue, 4 Feb 2014 11:17:47 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753827AbaBDARI (ORCPT ); Mon, 3 Feb 2014 19:17:08 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:2528 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753541AbaBDARC (ORCPT ); Mon, 3 Feb 2014 19:17:02 -0500 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Mon, 03 Feb 2014 16:17:43 -0800 Received: from hqemhub01.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Mon, 03 Feb 2014 16:15:38 -0800 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 03 Feb 2014 16:15:38 -0800 Received: from achew-linux64.nvidia.com (172.20.144.16) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server (TLS) id 8.3.327.1; Mon, 3 Feb 2014 16:17:02 -0800 From: Andrew Chew To: , , , , , , , , , CC: , , , , Andrew Chew Subject: [PATCH v2 1/3] clocksource: tegra: Add nvidia,tegra30-timer compat Date: Mon, 3 Feb 2014 16:17:33 -0800 Message-ID: <1391473055-3158-2-git-send-email-achew@nvidia.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1391473055-3158-1-git-send-email-achew@nvidia.com> References: <1391473055-3158-1-git-send-email-achew@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org There are some differences between tegra20's timer registers and tegra30's (and later). For example, tegra30 has more timers. In addition, watchdogs are not present in tegra20. Add this compatibility string in order to be able to distinguish whether the additional timers and watchdogs are there or not. Signed-off-by: Andrew Chew Acked-by: Stephen Warren --- drivers/clocksource/tegra20_timer.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c index d1869f0..73cfa56 100644 --- a/drivers/clocksource/tegra20_timer.c +++ b/drivers/clocksource/tegra20_timer.c @@ -218,6 +218,7 @@ static void __init tegra20_init_timer(struct device_node *np) 0x1, 0x1fffffff); } CLOCKSOURCE_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer); +CLOCKSOURCE_OF_DECLARE(tegra30_timer, "nvidia,tegra30-timer", tegra20_init_timer); static void __init tegra20_init_rtc(struct device_node *np) {