From patchwork Mon Mar 11 23:48:15 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: achew@nvidia.com X-Patchwork-Id: 226721 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 0DF8C2C02C1 for ; Tue, 12 Mar 2013 10:48:12 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754370Ab3CKXsK (ORCPT ); Mon, 11 Mar 2013 19:48:10 -0400 Received: from hqemgate04.nvidia.com ([216.228.121.35]:17717 "EHLO hqemgate04.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754314Ab3CKXsK (ORCPT ); Mon, 11 Mar 2013 19:48:10 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate04.nvidia.com id ; Mon, 11 Mar 2013 16:48:05 -0700 Received: from hqemhub02.nvidia.com ([172.17.108.22]) by hqnvupgp08.nvidia.com (PGP Universal service); Mon, 11 Mar 2013 16:41:40 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 11 Mar 2013 16:41:40 -0700 Received: from achew-linux64.nvidia.com (172.20.144.16) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server (TLS) id 8.3.298.1; Mon, 11 Mar 2013 16:48:09 -0700 From: Andrew Chew To: , CC: , Subject: [PATCH 1/1 v2] ARM: dt: tegra114: add PWM nodes Date: Mon, 11 Mar 2013 16:48:15 -0700 Message-ID: <1363045695-28874-1-git-send-email-achew@nvidia.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This patch adds device tree nodes for the four PWM controllers present on Tegra114. Signed-off-by: Andrew Chew --- Fixed commit message. Corrected the compatible property. Placed PWM nodes in the right place such that nodes are sorted by register address. arch/arm/boot/dts/tegra114.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index 1dfaf28..5741ae4 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -92,6 +92,38 @@ status = "disabled"; }; + pwm0: pwm@7000a000 { + compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm"; + reg = <0x7000a000 0x4>; + #pwm-cells = <2>; + clocks = <&tegra_car 17>; + status = "disabled"; + }; + + pwm1: pwm@7000a010 { + compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm"; + reg = <0x7000a010 0x4>; + #pwm-cells = <2>; + clocks = <&tegra_car 17>; + status = "disabled"; + }; + + pwm2: pwm@7000a020 { + compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm"; + reg = <0x7000a020 0x4>; + #pwm-cells = <2>; + clocks = <&tegra_car 17>; + status = "disabled"; + }; + + pwm3: pwm@7000a030 { + compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm"; + reg = <0x7000a030 0x4>; + #pwm-cells = <2>; + clocks = <&tegra_car 17>; + status = "disabled"; + }; + rtc { compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc"; reg = <0x7000e000 0x100>;