From patchwork Wed Nov 30 01:32:23 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Warren X-Patchwork-Id: 128373 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 8BF3AB6F76 for ; Wed, 30 Nov 2011 12:32:34 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756640Ab1K3Bce (ORCPT ); Tue, 29 Nov 2011 20:32:34 -0500 Received: from avon.wwwdotorg.org ([70.85.31.133]:41750 "EHLO avon.wwwdotorg.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754661Ab1K3Bcd (ORCPT ); Tue, 29 Nov 2011 20:32:33 -0500 Received: from severn.wwwdotorg.org (unknown [192.168.65.5]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPS id D329B631D; Tue, 29 Nov 2011 18:35:36 -0700 (MST) Received: from localhost.localdomain (searspoint.nvidia.com [216.228.112.21]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by severn.wwwdotorg.org (Postfix) with ESMTPSA id A7C89E4620; Tue, 29 Nov 2011 18:32:31 -0700 (MST) From: Stephen Warren To: Olof Johansson , Colin Cross Cc: Peter De Schrijver , Rob Herring , Grant Likely , devicetree-discuss@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, Stephen Warren Subject: [PATCH 2/2] gpio/tegra: Make it a DT interrupt controller Date: Tue, 29 Nov 2011 18:32:23 -0700 Message-Id: <1322616743-31985-2-git-send-email-swarren@nvidia.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1322616743-31985-1-git-send-email-swarren@nvidia.com> References: <1322616743-31985-1-git-send-email-swarren@nvidia.com> X-NVConfidentiality: public X-Virus-Scanned: clamav-milter 0.96.5 at avon.wwwdotorg.org X-Virus-Status: Clean Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Fix the DT binding documentation to describe interrupt-related properties, and the contents of "child" node interrupts property. Update tegra20.dtsi to specify the required interrupt-related properties. Fix the driver to creating an IRQ domain for itself, so that child node interrupts properties are correctly parsed. Signed-off-by: Stephen Warren --- This patch depends on "arm/tegra: convert tegra20 to GIC devicetree binding", at least for context, and probably functionally (and of course patch 1 in this series). I've tested that this patch causes the WM8903 to receive a valid IRQ when instantiated from device-tree (although the patches to instantiate the WM8903 from DT are local to me for now). .../devicetree/bindings/gpio/gpio_nvidia.txt | 10 ++++++++++ arch/arm/boot/dts/tegra20.dtsi | 2 ++ drivers/gpio/gpio-tegra.c | 4 ++++ 3 files changed, 16 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt b/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt index eb4b530..ecdf19c 100644 --- a/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt +++ b/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt @@ -6,3 +6,13 @@ Required properties: second cell is used to specify optional parameters: - bit 0 specifies polarity (0 for normal, 1 for inverted) - gpio-controller : Marks the device node as a GPIO controller. +- #interrupt-cells : Should be 3. + The first cell is the GPIO number. + The second cell is used to specify flags: + bits[3:0] trigger type and level flags: + 1 = low-to-high edge triggered. + 2 = high-to-low edge triggered. + 4 = active high level-sensitive. + 8 = active low level-sensitive. + Valid combinations are 1, 2, 3, 4, 8. +- interrupt-controller : Marks the device node as an interrupt controller. diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index db6f562..e25f4a6 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -79,6 +79,8 @@ 0 55 0x04 0 87 0x04 0 89 0x04 >; + interrupt-controller; + #interrupt-cells = <2>; #gpio-cells = <2>; gpio-controller; }; diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c index 61044c8..26b0c85 100644 --- a/drivers/gpio/gpio-tegra.c +++ b/drivers/gpio/gpio-tegra.c @@ -25,6 +25,7 @@ #include #include #include +#include #include @@ -410,6 +411,9 @@ static int __devinit tegra_gpio_probe(struct platform_device *pdev) spin_lock_init(&bank->lvl_lock[j]); } + if (pdev->dev.of_node) + irq_domain_add_simple(pdev->dev.of_node, TEGRA_GPIO_TO_IRQ(0)); + return 0; }