| Message ID | 01498fee0d3c3ffba7a53e46463671584fa3193e.1722206275.git.nicolinc@nvidia.com |
|---|---|
| State | Handled Elsewhere |
| Headers | show
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Sun, 28 Jul 2024 15:45:04 -0700 From: Nicolin Chen <nicolinc@nvidia.com> To: <will@kernel.org> CC: <robin.murphy@arm.com>, <joro@8bytes.org>, <jgg@nvidia.com>, <thierry.reding@gmail.com>, <vdumpa@nvidia.com>, <jonathanh@nvidia.com>, <linux-kernel@vger.kernel.org>, <iommu@lists.linux.dev>, <linux-arm-kernel@lists.infradead.org>, <linux-tegra@vger.kernel.org> Subject: [PATCH v10 4/9] iommu/arm-smmu-v3: Pass in cmdq pointer to arm_smmu_cmdq_init Date: Sun, 28 Jul 2024 15:44:49 -0700 Message-ID: <01498fee0d3c3ffba7a53e46463671584fa3193e.1722206275.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <cover.1722206275.git.nicolinc@nvidia.com> References: <cover.1722206275.git.nicolinc@nvidia.com> Precedence: bulk X-Mailing-List: linux-tegra@vger.kernel.org List-Id: <linux-tegra.vger.kernel.org> List-Subscribe: <mailto:linux-tegra+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-tegra+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000A672E:EE_|MN2PR12MB4319:EE_ X-MS-Office365-Filtering-Correlation-Id: 1f859b3b-027e-41b0-e159-08dcaf56f301 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|376014|1800799024; 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Add Tegra241 (Grace) CMDQV Support (part 1/2)
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diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index d11362e9fc8a0..e664c40b14aee 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3555,9 +3555,9 @@ static int arm_smmu_init_one_queue(struct arm_smmu_device *smmu, return 0; } -static int arm_smmu_cmdq_init(struct arm_smmu_device *smmu) +static int arm_smmu_cmdq_init(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq *cmdq) { - struct arm_smmu_cmdq *cmdq = &smmu->cmdq; unsigned int nents = 1 << cmdq->q.llq.max_n_shift; atomic_set(&cmdq->owner_prod, 0); @@ -3582,7 +3582,7 @@ static int arm_smmu_init_queues(struct arm_smmu_device *smmu) if (ret) return ret; - ret = arm_smmu_cmdq_init(smmu); + ret = arm_smmu_cmdq_init(smmu, &smmu->cmdq); if (ret) return ret;
So that this function can be used by other cmdqs than &smmu->cmdq only. Signed-off-by: Nicolin Chen <nicolinc@nvidia.com> --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)