From patchwork Fri Jan 11 02:38:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Zhang X-Patchwork-Id: 1023340 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="BVDvrq2y"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43bRrg6V4fz9sCs for ; Fri, 11 Jan 2019 13:38:59 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728798AbfAKCi6 (ORCPT ); Thu, 10 Jan 2019 21:38:58 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:1298 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727745AbfAKCi6 (ORCPT ); Thu, 10 Jan 2019 21:38:58 -0500 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 10 Jan 2019 18:38:44 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Thu, 10 Jan 2019 18:38:58 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Thu, 10 Jan 2019 18:38:58 -0800 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 11 Jan 2019 02:38:57 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Fri, 11 Jan 2019 02:38:57 +0000 Received: from localhost.localdomain (Not Verified[10.19.225.143]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Thu, 10 Jan 2019 18:38:57 -0800 From: Mark Zhang To: , , CC: Mark Zhang Subject: [PATCH v3 0/5] NVIDIA Shield TV device tree patch set Date: Fri, 11 Jan 2019 10:38:44 +0800 Message-ID: <20190111023849.20822-1-markz@nvidia.com> X-Mailer: git-send-email 2.19.2 MIME-Version: 1.0 X-NVConfidentiality: public DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1547174324; bh=E737k9+0CMLDSaEKChXUo2So4uACXowEk8tLe+hsTDw=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: MIME-Version:X-NVConfidentiality:Content-Transfer-Encoding: Content-Type; b=BVDvrq2yrJMcmMWtZQNhjZg1yyCBkhc0loJHngqvtIudE1Gc7rYoXKTSLMUnXhw1X 0UaNicwOaMC1p3CnviM+qOpCWppuM77pGhq7OX1Z4zu1gCQppbEmykObDX2rfgdYAA hCLnlN2imkQp25/deOo7yxVz0czqjPA8HokM8ExjmqCJVSlJ6VE87RCErPAuvAYLvh WnNG7cuCqID1f9E2uKYHkPYT3XDl5sTCneh9wgDC7NFlOT/Oy4shFwiHENoA756DAO TFI41ixfEmk+IYbLg8WrkokKonO1e6OT80XN9ihyh4G+wQH/H6W76RtgMHHEbnm9TC NtO8ZzsVwH51w== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This patch set adds an initial support for NVIDIA Shield TV, including: pinmux, gpio-keys, max77620 and regulators. Changes in v3: - Add "nvidia,p2894-0050-a08" in compatible string list - Add "wakeup-event-action" for gpio keys which has wakeup-source ability Changes in v2: - Change tegra.yaml in devicetree documentation - Removed "line-name", "gpio-keys,name" in GPIO dts nodes - Replace 0 with GPIO_ACTIVE_HIGH in GPIO dts nodes - Formated regulator dts properties(standard properties first then vendor specific properties) - Removed undeclared dts property: regulator-disable-on-shutdown - Use tegra-pinmux-scripts to generate the pinmux dts contents (a change in tegra-pinmux-scripts is sent as well) Mark Zhang (5): arm64: tegra: Add support for NVIDIA Shield TV dt-bindings: tegra: Add Shield TV device tree binding documentation arm64: tegra: Add gpio-keys nodes for Darcy arm64: tegra: Add pinmux for Darcy board arm64: tegra: Add regulators for Tegra210 Darcy .../devicetree/bindings/arm/tegra.yaml | 2 + arch/arm64/boot/dts/nvidia/Makefile | 1 + .../dts/nvidia/tegra210-p2894-0050-a08.dts | 9 + .../arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 1858 +++++++++++++++++ 4 files changed, 1870 insertions(+) create mode 100644 arch/arm64/boot/dts/nvidia/tegra210-p2894-0050-a08.dts create mode 100644 arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi