@@ -39,6 +39,11 @@ properties:
"#size-cells":
const: 0
+ # According to the datasheet, "Data is clocked in from SDI on the falling
+ # edge of SCLK, while data is clocked out on DOUTA on the rising edge of
+ # SCLK". Also, even if not stated textually in the datasheet, it is made
+ # clear on the diagrams that sclk idles at high. Subsequently, in case SPI
+ # interface is used, the correct way is to only set spi-cpol.
spi-cpha: true
spi-cpol: true
@@ -168,7 +173,6 @@ patternProperties:
required:
- compatible
- reg
- - spi-cpha
- avcc-supply
- vdrive-supply
- interrupts
@@ -255,7 +259,6 @@ examples:
reg = <0>;
spi-max-frequency = <1000000>;
spi-cpol;
- spi-cpha;
avcc-supply = <&adc_vref>;
vdrive-supply = <&vdd_supply>;
@@ -288,7 +291,6 @@ examples:
spi-max-frequency = <1000000>;
spi-cpol;
- spi-cpha;
avcc-supply = <&adc_vref>;
vdrive-supply = <&vdd_supply>;