| Message ID | 20220512094125.3748197-2-chris.packham@alliedtelesis.co.nz |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | [v3,1/2] dt-bindings: gpio: gpio-mvebu: convert txt binding to YAML | expand |
On 12/05/2022 11:41, Chris Packham wrote: > The offset and marvell,pwm-offset properties weren't in the old binding. > Add them based on the existing usage when the marvell,armada-8k-gpio > compatible is used. > > Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> > --- > > Notes: > Changes in v3: > - Split off from 1:1 conversion patch To clarify - this documents properties already used in driver and DTS so: Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml index 2d95ef707f53..790a17af7c59 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml @@ -41,6 +41,10 @@ properties: - const: pwm minItems: 1 + offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Offset in the register map for the gpio registers (in bytes) + interrupts: description: | The list of interrupts that are used for all the pins managed by this @@ -64,6 +68,10 @@ properties: "#gpio-cells": const: 2 + marvell,pwm-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Offset in the register map for the pwm registers (in bytes) + "#pwm-cells": description: The first cell is the GPIO line number. The second cell is the period
The offset and marvell,pwm-offset properties weren't in the old binding. Add them based on the existing usage when the marvell,armada-8k-gpio compatible is used. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> --- Notes: Changes in v3: - Split off from 1:1 conversion patch Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml | 8 ++++++++ 1 file changed, 8 insertions(+)