From patchwork Mon Jul 14 14:33:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 369649 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id D0A7F1400B5 for ; Tue, 15 Jul 2014 00:34:55 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755823AbaGNOeB (ORCPT ); Mon, 14 Jul 2014 10:34:01 -0400 Received: from mail-ie0-f172.google.com ([209.85.223.172]:57588 "EHLO mail-ie0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755709AbaGNOdv (ORCPT ); Mon, 14 Jul 2014 10:33:51 -0400 Received: by mail-ie0-f172.google.com with SMTP id lx4so1254280iec.31 for ; Mon, 14 Jul 2014 07:33:50 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uA5cJf4xktTnaLiVnZ9N5ba81IL9Wy4CC8zTWnCmXE0=; b=A7B2ukLINRcUKI9aP9fG94iSghTyi8RW4Lc+rtrFrnwrY4yWGrq1ZUM8fNkry20KjW y9pNEkRiGkg51g2VoF6hYAG/Sx5ZWV4CEdtaqK6wq94n/PJxpIt/iYk/42JBNOWVETWR 3FSIhlOr+W76Jnb+l67hm4IP2K6Tzgc+qLQ5elayx/NOxbrXZbSX/jem1DtPsY9JUmtN gp/QpDlLImTEmYItNyX10YEG26bIlb1ydMa5g3GcBpyzoRst+Jji22kCV6ZsbaAY+td5 gJejGaBMIJSW4jq67hF49lRZ7BmTZuEeCKpY4FKcmcgqc0zMEe9+gw95Xz/bbau/lwGX s45Q== X-Gm-Message-State: ALoCoQnBs62ro4Sw6Bzln6tHRvTo3C0e9f/iwY9fnRiTSo6a/GUjUGYGCZzp6wE18p/J5z/SkkeA X-Received: by 10.50.77.48 with SMTP id p16mr25724195igw.41.1405348430213; Mon, 14 Jul 2014 07:33:50 -0700 (PDT) Received: from localhost.localdomain (host109-148-237-85.range109-148.btcentralplus.com. [109.148.237.85]) by mx.google.com with ESMTPSA id q11sm25317390igr.7.2014.07.14.07.33.47 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 14 Jul 2014 07:33:49 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: lee.jones@linaro.org, kernel@stlinux.com, thierry.reding@gmail.com, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, ajitpal.singh@st.com Subject: [PATCH v2 03/11] ARM: stih416: Add DT nodes for PWM Date: Mon, 14 Jul 2014 15:33:24 +0100 Message-Id: <1405348412-7352-4-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1405348412-7352-1-git-send-email-lee.jones@linaro.org> References: <1405348412-7352-1-git-send-email-lee.jones@linaro.org> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Supply top level nodes for the STiH416 based development boards. The Pinctrl configuration has already been applied, so the only missing piece of the DT puzzle is for a board's DTB to enable the nodes. Signed-off-by: Ajit Pal Singh Signed-off-by: Lee Jones --- arch/arm/boot/dts/stih416.dtsi | 44 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 43 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi index 84758d7..c28ef85 100644 --- a/arch/arm/boot/dts/stih416.dtsi +++ b/arch/arm/boot/dts/stih416.dtsi @@ -102,7 +102,7 @@ interrupts = <0 210 0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sbc_serial1>; - clocks = <&clk_sysin>; + clocks = <&clk_sysin>; }; i2c@fed40000 { @@ -236,5 +236,47 @@ resets = <&powerdown STIH416_KEYSCAN_POWERDOWN>, <&softreset STIH416_KEYSCAN_SOFTRESET>; }; + + /* SAS PWM Module */ + pwm0: pwm@fed10000 { + compatible = "st,sti-pwm"; + status = "disabled"; + #pwm-cells = <2>; + reg = <0xfed10000 0x68>; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_chan0_default + &pinctrl_pwm0_chan1_default + &pinctrl_pwm0_chan2_default + &pinctrl_pwm0_chan3_default>; + + clock-names = "pwm"; + clocks = <&clk_sysin>; + st,pwm-num-chan = <4>; + }; + + /* SBC PWM Module */ + pwm1: pwm@fe510000 { + compatible = "st,sti-pwm"; + status = "disabled"; + #pwm-cells = <2>; + reg = <0xfe510000 0x68>; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1_chan0_default + /* + * Shared with SBC_OBS_NOTRST. Don't + * enable unless you really know what + * you're doing. + * + * &pinctrl_pwm1_chan1_default + */ + &pinctrl_pwm1_chan2_default + &pinctrl_pwm1_chan3_default>; + + clock-names = "pwm"; + clocks = <&clk_sysin>; + st,pwm-num-chan = <3>; + }; }; };