From patchwork Mon Jul 14 14:33:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 369644 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46650140097 for ; Tue, 15 Jul 2014 00:34:04 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755749AbaGNOd5 (ORCPT ); Mon, 14 Jul 2014 10:33:57 -0400 Received: from mail-ig0-f182.google.com ([209.85.213.182]:45825 "EHLO mail-ig0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755669AbaGNOdt (ORCPT ); Mon, 14 Jul 2014 10:33:49 -0400 Received: by mail-ig0-f182.google.com with SMTP id c1so1782430igq.9 for ; Mon, 14 Jul 2014 07:33:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=INBwXfVdEjcomTMx3x50pRDIQDxsW2aQ6jtV6pqQHFA=; b=Um91RQwBu4QJCT72QmN5T3xcJyDtJkQNNz9Jji7lu4YdSIFSnlzDaXZsAeUX5f6tJw 590HWoT3K5VFze0+I/qZ2s0zbxmcjh5x4trWCFxpWIM9TXZTw0acBcWjEDA63TyIbtWd amGLuidi8FxQeILMxRsARvHCTROb4hUcTwsvSmjP3hTcfsHXS8JcvU+OlC4slM67hSrZ NVsS94XrvdOZl0Cfbs77d7DNBNvkfIUdIkPcKhOjViLwIo7LpDH1J1v+/76LdDc5X/BI eVIiR3aLkkHcfBJxbCiLouUGDlcPkOPy/3VFbIGldYHRcDlannmFT/hVb14lCxhP79Ef BCFQ== X-Gm-Message-State: ALoCoQnEn025cFVXvFOUYA6/Z9s/w7Vxl0RKA0xEMV9gtXmPtM2Xa7xInfHLv5v8yunkc1YBJC/1 X-Received: by 10.42.76.139 with SMTP id e11mr3612221ick.77.1405348427829; Mon, 14 Jul 2014 07:33:47 -0700 (PDT) Received: from localhost.localdomain (host109-148-237-85.range109-148.btcentralplus.com. [109.148.237.85]) by mx.google.com with ESMTPSA id q11sm25317390igr.7.2014.07.14.07.33.45 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 14 Jul 2014 07:33:47 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: lee.jones@linaro.org, kernel@stlinux.com, thierry.reding@gmail.com, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, ajitpal.singh@st.com Subject: [PATCH v2 02/11] ARM: stih416: Add Pinctrl settings for PWM Date: Mon, 14 Jul 2014 15:33:23 +0100 Message-Id: <1405348412-7352-3-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1405348412-7352-1-git-send-email-lee.jones@linaro.org> References: <1405348412-7352-1-git-send-email-lee.jones@linaro.org> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Supply the Pinctrl configuration to enable PWM{0,1} lines on STiH416 based development boards. Signed-off-by: Ajit Pal Singh Signed-off-by: Lee Jones --- arch/arm/boot/dts/stih416-pinctrl.dtsi | 50 ++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi b/arch/arm/boot/dts/stih416-pinctrl.dtsi index ee6c119..04e61d6 100644 --- a/arch/arm/boot/dts/stih416-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih416-pinctrl.dtsi @@ -207,6 +207,29 @@ }; }; }; + + pwm1 { + pinctrl_pwm1_chan0_default: pwm1-0-default { + st,pins { + pwm-out = <&PIO3 0 ALT1 OUT>; + }; + }; + pinctrl_pwm1_chan1_default: pwm1-1-default { + st,pins { + pwm-out = <&PIO4 4 ALT1 OUT>; + }; + }; + pinctrl_pwm1_chan2_default: pwm1-2-default { + st,pins { + pwm-out = <&PIO4 6 ALT3 OUT>; + }; + }; + pinctrl_pwm1_chan3_default: pwm1-3-default { + st,pins { + pwm-out = <&PIO4 7 ALT3 OUT>; + }; + }; + }; }; pin-controller-front { @@ -301,6 +324,14 @@ st,bank-name = "PIO31"; }; + pwm0 { + pinctrl_pwm0_chan0_default: pwm0-0-default { + st,pins { + pwm-out = <&PIO9 7 ALT2 OUT>; + }; + }; + }; + serial2-oe { pinctrl_serial2_oe: serial2-1 { st,pins { @@ -467,6 +498,25 @@ }; }; }; + + pwm0 { + pinctrl_pwm0_chan1_default: pwm0-1-default { + st,pins { + pwm-out = <&PIO13 2 ALT2 OUT>; + }; + }; + pinctrl_pwm0_chan2_default: pwm0-2-default { + st,pins { + pwm-out = <&PIO15 2 ALT4 OUT>; + }; + }; + pinctrl_pwm0_chan3_default: pwm0-3-default { + st,pins { + pwm-out = <&PIO17 4 ALT1 OUT>; + }; + }; + }; + }; pin-controller-fvdp-fe {