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[v3,0/3] Add support for linking gpt with poeg

Message ID 20221215205843.4074504-1-biju.das.jz@bp.renesas.com
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Series Add support for linking gpt with poeg | expand

Message

Biju Das Dec. 15, 2022, 8:58 p.m. UTC 
Renesas RZ/G2L gpt supports output pin disable function by dead time
error and detecting short-circuits between output pins. There are 4
poeg groups shared between gpt channels.

This patch adds support for linking poeg group with gpt channel, so that
gpt channel can control the output disable function through poeg module(port
output enable for gpt)

v2->v3:
 * Moved minItems/MaxItems one level up in bindings.
 * Updated commit header and description for the driver
 * Added check for poeg group in rzg2l_gpt_parse_properties().
v1->v2:
 * removed quotes from ref
 * Added maxItems and minItems for renesas,poegs property
 * Added enums for gpt index
 * Replaced id->poeg-id as per poeg bindings in patch#3.
 
patch#1 is just added to avoid bot errors.
[1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20221214132232.2835828-2-biju.das.jz@bp.renesas.com/

Patch#3 depend upon [2]
[2] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20221214132232.2835828-3-biju.das.jz@bp.renesas.com/

Biju Das (3):
  dt-bindings: pwm: Add RZ/G2L GPT binding
  dt-bindings: pwm: rzg2l-gpt: Document renesas,poegs property
  pwm: rzg2l-gpt: Add support for gpt linking with poeg

 .../bindings/pwm/renesas,rzg2l-gpt.yaml       | 401 ++++++++++++++++++
 drivers/pwm/pwm-rzg2l-gpt.c                   |  76 ++++
 2 files changed, 477 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml