From patchwork Sat Sep 17 12:03:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Maciej W. Rozycki" X-Patchwork-Id: 1678896 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4MV8j64xKKz1ync for ; Sat, 17 Sep 2022 22:03:22 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229626AbiIQMDT (ORCPT ); Sat, 17 Sep 2022 08:03:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229586AbiIQMDN (ORCPT ); Sat, 17 Sep 2022 08:03:13 -0400 Received: from angie.orcam.me.uk (angie.orcam.me.uk [IPv6:2001:4190:8020::34]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id E9064303FA for ; Sat, 17 Sep 2022 05:03:12 -0700 (PDT) Received: by angie.orcam.me.uk (Postfix, from userid 500) id 13F2192009C; Sat, 17 Sep 2022 14:03:10 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by angie.orcam.me.uk (Postfix) with ESMTP id 0E49D92009B; Sat, 17 Sep 2022 13:03:10 +0100 (BST) Date: Sat, 17 Sep 2022 13:03:09 +0100 (BST) From: "Maciej W. Rozycki" To: Bjorn Helgaas cc: Stefan Roese , Jim Wilson , David Abdurachmanov , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 1/5] PCI: Consistently report presence of PCIe link registers In-Reply-To: Message-ID: References: User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Consistently with commit c8b303d0206b ("PCI: Remove PCIe Capability version checks") only consider the PCI Express capability's Link Control 2, etc. registers present if the Link Control register is. Before said commit with PCI Express capability versions higher than one all link registers used to be considered present, however starting from said commit Link Control, etc. original registers are only considered present in devices with links, but Link Control 2, etc. registers continue being considered always present even though likewise they are only present in devices with links. Fix the inconsistency then. Signed-off-by: Maciej W. Rozycki --- New change in v5. --- drivers/pci/access.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) linux-pcie-cap-has-lnkctl2.diff Index: linux-macro/drivers/pci/access.c =================================================================== --- linux-macro.orig/drivers/pci/access.c +++ linux-macro/drivers/pci/access.c @@ -350,6 +350,11 @@ bool pcie_cap_has_lnkctl(const struct pc type == PCI_EXP_TYPE_PCIE_BRIDGE; } +static inline bool pcie_cap_has_lnkctl2(const struct pci_dev *dev) +{ + return pcie_cap_has_lnkctl(dev) && pcie_cap_version(dev) > 1; +} + static inline bool pcie_cap_has_sltctl(const struct pci_dev *dev) { return pcie_downstream_port(dev) && @@ -390,10 +395,11 @@ static bool pcie_capability_reg_implemen return pcie_cap_has_rtctl(dev); case PCI_EXP_DEVCAP2: case PCI_EXP_DEVCTL2: + return pcie_cap_version(dev) > 1; case PCI_EXP_LNKCAP2: case PCI_EXP_LNKCTL2: case PCI_EXP_LNKSTA2: - return pcie_cap_version(dev) > 1; + return pcie_cap_has_lnkctl2(dev); default: return false; }