From patchwork Mon Nov 23 09:29:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stanimir Varbanov X-Patchwork-Id: 547424 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id E47D71402B2 for ; Mon, 23 Nov 2015 20:31:34 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro-org.20150623.gappssmtp.com header.i=@linaro-org.20150623.gappssmtp.com header.b=erkX7a9T; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753631AbbKWJay (ORCPT ); Mon, 23 Nov 2015 04:30:54 -0500 Received: from mail-wm0-f43.google.com ([74.125.82.43]:35839 "EHLO mail-wm0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754215AbbKWJ3r (ORCPT ); Mon, 23 Nov 2015 04:29:47 -0500 Received: by wmuu63 with SMTP id u63so45496898wmu.0 for ; Mon, 23 Nov 2015 01:29:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=cNBoCEEH0moyx2DlnKVXWTvkiskAGOQa9o55ltyiDS4=; b=erkX7a9TXPFhVC4Rb22Q1K0ZwRG7ClOOhtUj3sQhvlmuO+HxIjiDkYUu+4/aP7EKqD KEFE9sVEAmqwqYztBvPPRWx4JtL82O64w9wb3tOIZBOTaK4oB6BSxcVDU7FLCqRf8yUb l8wQBvDGATLQIY5WMFod2QXmn36t7U5N/BWreEDr1ViPPqQUo4u6BmIHI+F/Q4mc/MHx +3RHd30iUSW+Z57xWnMySSHxre7IfaFp86oq3SRXxf8mrvBX31qIipAxlL5CCUaecKCp 30sBLmBjGDVUCMg284D21Ud43GDxhO1UzZO2HT7BOLm17mUyABUcPvWoDTzAf0N6NNBq y4wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=cNBoCEEH0moyx2DlnKVXWTvkiskAGOQa9o55ltyiDS4=; b=KGPj9onCpwau7uDmLzGZ38AOpDKu7+US/cWB8lixEMFMj/Rw1BNj24VSg9MyKrOHoC Paf2Bd2Ybiun9dmY6kudmJYcZQ3R55nrapAG/pes1T2J0IeY4bcF+OfY70EKKNu1ZELh AgHCePM27Wf8SqOSf2ktTSq3HwrhnMMexdaI1DOQelF/UIdkhdW5EYvnxN0iQOfpns6H omAaC1nqXe4LfPMs7KbmasVLaFfhhpe4h+b/cvJF9BCBvTL3dPiNuE7J33im5ilAWNzz RnunewLbGecBj6XlEDockBAqhgq2DjwUAva4ZnzcE67SAMw4J0ngwHtWuLS+ToWhsYEA 7AyQ== X-Gm-Message-State: ALoCoQlhmrXU32+I5aX7wVXhYw8Rd5MBv6qMM+ANMp+en6DhrAbmWMLFAdJ/Zl63znQXkkoZ+o0g X-Received: by 10.28.96.193 with SMTP id u184mr6180991wmb.64.1448270986125; Mon, 23 Nov 2015 01:29:46 -0800 (PST) Received: from mms734.qualcomm.mm-sol.com ([37.157.136.206]) by smtp.gmail.com with ESMTPSA id k125sm5547508wmf.2.2015.11.23.01.29.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 23 Nov 2015 01:29:45 -0800 (PST) From: Stanimir Varbanov To: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, Bjorn Helgaas Cc: Srinivas Kandagatla , Rob Herring , Rob Herring , Mark Rutland , Pawel Moll , Ian Campbell , Arnd Bergmann , Jingoo Han , Pratyush Anand , Bjorn Andersson , Stanimir Varbanov Subject: [PATCH v3 5/6] ARM: dts: apq8064: add pcie devicetree node Date: Mon, 23 Nov 2015 11:29:02 +0200 Message-Id: <6f3e1dfd0fb433dbe07242ad32c5cbca39126e59.1448270813.git.stanimir.varbanov@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add the pcie dt node so that it can probe and used. Signed-off-by: Stanimir Varbanov --- arch/arm/boot/dts/qcom-apq8064.dtsi | 36 +++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index a4c1762b53ea..bb7181e8ef2f 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -659,5 +659,41 @@ compatible = "qcom,tcsr-apq8064", "syscon"; reg = <0x1a400000 0x100>; }; + + pcie: pci@1b500000 { + compatible = "qcom,pcie-v0", "snps,dw-pcie"; + reg = <0x1b500000 0x1000 + 0x1b502000 0x80 + 0x1b600000 0x100 + 0x0ff00000 0x100000>; + reg-names = "dbi", "elbi", "parf", "config"; + device_type = "pci"; + linux,pci-domain = <0>; + bus-range = <0x00 0xff>; + num-lanes = <1>; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000 /* I/O */ + 0x82000000 0 0 0x08000000 0 0x07e00000>; /* memory */ + interrupts = ; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + clocks = <&gcc PCIE_A_CLK>, + <&gcc PCIE_H_CLK>, + <&gcc PCIE_PHY_REF_CLK>; + clock-names = "core", "iface", "phy"; + resets = <&gcc PCIE_ACLK_RESET>, + <&gcc PCIE_HCLK_RESET>, + <&gcc PCIE_POR_RESET>, + <&gcc PCIE_PCI_RESET>, + <&gcc PCIE_PHY_RESET>; + reset-names = "axi", "ahb", "por", "pci", "phy"; + status = "disabled"; + }; }; };