| Message ID | 20240731222831.14895-3-james.quinlan@broadcom.com |
|---|---|
| State | New |
| Headers | show |
| Series | PCI: brcnstb: Enable STB 7712 SOC | expand |
On 7/31/24 15:28, Jim Quinlan wrote: > Add description for the 7712 SoC, a Broadcom STB sibling chip of the RPi 5. > The 7712 uses three reset controllers: rescal, for phy reset calibration; > bridge, for the bridge between the PCIe bus and the memory bus; and swinit, > which is a "soft" initialization of the PCIe HW. > > Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
On 01/08/2024 00:28, Jim Quinlan wrote: > Add description for the 7712 SoC, a Broadcom STB sibling chip of the RPi 5. > The 7712 uses three reset controllers: rescal, for phy reset calibration; > bridge, for the bridge between the PCIe bus and the memory bus; and swinit, > which is a "soft" initialization of the PCIe HW. > > Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml index 7d2552192153..0925c520195a 100644 --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml @@ -21,6 +21,7 @@ properties: - brcm,bcm7425-pcie # Broadcom 7425 MIPs - brcm,bcm7435-pcie # Broadcom 7435 MIPs - brcm,bcm7445-pcie # Broadcom 7445 Arm + - brcm,bcm7712-pcie # Broadcom STB sibling of Rpi 5 reg: maxItems: 1 @@ -96,10 +97,12 @@ properties: maxItems: 3 resets: - maxItems: 1 + minItems: 1 + maxItems: 3 reset-names: - maxItems: 1 + minItems: 1 + maxItems: 3 required: - compatible @@ -151,6 +154,27 @@ allOf: - resets - reset-names + - if: + properties: + compatible: + contains: + const: brcm,bcm7712-pcie + then: + properties: + resets: + minItems: 3 + maxItems: 3 + + reset-names: + items: + - const: rescal + - const: bridge + - const: swinit + + required: + - resets + - reset-names + unevaluatedProperties: false examples:
Add description for the 7712 SoC, a Broadcom STB sibling chip of the RPi 5. The 7712 uses three reset controllers: rescal, for phy reset calibration; bridge, for the bridge between the PCIe bus and the memory bus; and swinit, which is a "soft" initialization of the PCIe HW. Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com> --- .../bindings/pci/brcm,stb-pcie.yaml | 28 +++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-)