Message ID | 20240716193246.1909697-6-stewart.hildebrand@amd.com |
---|---|
State | New |
Headers | show
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Tue, 16 Jul 2024 14:34:29 -0500 From: Stewart Hildebrand <stewart.hildebrand@amd.com> To: Bjorn Helgaas <bhelgaas@google.com>, Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>, Dave Hansen <dave.hansen@linux.intel.com>, "H. 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Series |
PCI: Align small (<4k) BARs
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expand
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diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index 3abd55902dbc..13d7f7ac3bde 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c @@ -256,7 +256,7 @@ static void alloc_resource(struct pci_dev *dev, int idx, int pass) if (r->flags & IORESOURCE_PCI_FIXED) { dev_info(&dev->dev, "BAR %d %pR is immovable\n", idx, r); - } else { + } else if (!(r->flags & IORESOURCE_STARTALIGN)) { /* We'll assign a new address later */ pcibios_save_fw_addr(dev, idx, r->start); r->end -= r->start;
There is a corner case in pcibios_allocate_dev_resources() where the IORESOURCE_STARTALIGN alignment of memory BAR resources gets overwritten. This does not affect bridge resources. The corner case is not yet possible to trigger on x86, but it will be possible once the default resource alignment changes, and memory BAR resources will start to use IORESOURCE_STARTALIGN. Account for IORESOURCE_STARTALIGN in preparation for changing the default resource alignment. Skip the pcibios_save_fw_addr() call since the resource doesn't contain a valid address when alignment has been requested. The impact of this is that we won't be able to restore the firmware allocated BAR, which does not meet alignment requirements anyway. Signed-off-by: Stewart Hildebrand <stewart.hildebrand@amd.com> --- v1->v2: * capitalize subject text * clarify commit message * skip pcibios_save_fw_addr() call --- arch/x86/pci/i386.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)