Message ID | 20240709133610.1089420-2-stewart.hildebrand@amd.com |
---|---|
State | New |
Headers | show
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Tue, 9 Jul 2024 08:36:20 -0500 From: Stewart Hildebrand <stewart.hildebrand@amd.com> To: Bjorn Helgaas <bhelgaas@google.com> CC: Stewart Hildebrand <stewart.hildebrand@amd.com>, <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH 1/6] PCI: don't clear already cleared bit Date: Tue, 9 Jul 2024 09:35:58 -0400 Message-ID: <20240709133610.1089420-2-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240709133610.1089420-1-stewart.hildebrand@amd.com> References: <20240709133610.1089420-1-stewart.hildebrand@amd.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: <linux-pci.vger.kernel.org> List-Subscribe: <mailto:linux-pci+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-pci+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB04.amd.com: stewart.hildebrand@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000023D8:EE_|DM6PR12MB4267:EE_ X-MS-Office365-Filtering-Correlation-Id: 5932d28c-4c84-4aee-19f8-08dca01c1fb7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|1800799024|376014; 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PCI: align small (<4k) BARs
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expand
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diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index df550953fa26..f017e7a8f028 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -6632,8 +6632,10 @@ void pci_reassigndev_resource_alignment(struct pci_dev *dev) } pci_read_config_word(dev, PCI_COMMAND, &command); - command &= ~PCI_COMMAND_MEMORY; - pci_write_config_word(dev, PCI_COMMAND, command); + if (command & PCI_COMMAND_MEMORY) { + command &= ~PCI_COMMAND_MEMORY; + pci_write_config_word(dev, PCI_COMMAND, command); + } for (i = 0; i <= PCI_ROM_RESOURCE; i++) pci_request_resource_alignment(dev, i, align, resize);
pci_reassigndev_resource_alignment() performs a PCI config read, then then unconditionally clears a bit and issues a PCI config write. However, the bit in question (PCI_COMMAND_MEMORY) is a RW bit, so it is unnecessary to issue the PCI config write if the bit is already cleared. Make the write conditional. Signed-off-by: Stewart Hildebrand <stewart.hildebrand@amd.com> --- Should this be folded into ("pci: restore memory decoding after reallocation") in this series? --- drivers/pci/pci.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)