| Message ID | 20230426045557.3613826-4-yoshihiro.shimoda.uh@renesas.com |
|---|---|
| State | New |
| Headers | show |
| Series | PCI: rcar-gen4: Add R-Car Gen4 PCIe support | expand |
On Wed, Apr 26, 2023 at 01:55:39PM +0900, Yoshihiro Shimoda wrote: > Add "Message Routing" and "INTx Mechanism Messages" macros to send > a message by a PCIe driver. > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > --- > .../pci/controller/dwc/pcie-designware-ep.c | 1 + > drivers/pci/pci.h | 19 +++++++++++++++++++ > 2 files changed, 20 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c > index f9182f8d552f..205bbcc6af27 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c > @@ -9,6 +9,7 @@ > #include <linux/of.h> > #include <linux/platform_device.h> > > +#include "../../pci.h" Unrelated change since the new macros are left unused in the framework of this patch. Please move it to the patch which implies using the new defines and where the included header file content is required. > #include "pcie-designware.h" > #include <linux/pci-epc.h> > #include <linux/pci-epf.h> > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h > index 2475098f6518..4be376c121a4 100644 > --- a/drivers/pci/pci.h > +++ b/drivers/pci/pci.h > @@ -11,6 +11,25 @@ > > #define PCI_VSEC_ID_INTEL_TBT 0x1234 /* Thunderbolt */ > > +/* Message Routing */ > +#define PCI_MSG_ROUTING_RC 0 > +#define PCI_MSG_ROUTING_ADDR 1 > +#define PCI_MSG_ROUTING_ID 2 > +#define PCI_MSG_ROUTING_BC 3 > +#define PCI_MSG_ROUTING_LOCAL 4 > +#define PCI_MSG_ROUTING_GATHER 5 > + > +/* INTx Mechanism Messages */ > +#define PCI_CODE_ASSERT_INTA 0x20 > +#define PCI_CODE_ASSERT_INTB 0x21 > +#define PCI_CODE_ASSERT_INTC 0x22 > +#define PCI_CODE_ASSERT_INTD 0x23 > +#define PCI_CODE_DEASSERT_INTA 0x24 > +#define PCI_CODE_DEASSERT_INTB 0x25 > +#define PCI_CODE_DEASSERT_INTC 0x26 > +#define PCI_CODE_DEASSERT_INTD 0x27 > + > + Excessive new line. Please drop it. -Serge(y) > extern const unsigned char pcie_link_speed[]; > extern bool pci_early_dump; > > -- > 2.25.1 >
Hi Serge, > From: Serge Semin, Sent: Tuesday, May 2, 2023 2:35 AM > > On Wed, Apr 26, 2023 at 01:55:39PM +0900, Yoshihiro Shimoda wrote: > > Add "Message Routing" and "INTx Mechanism Messages" macros to send > > a message by a PCIe driver. > > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> > > --- > > .../pci/controller/dwc/pcie-designware-ep.c | 1 + > > drivers/pci/pci.h | 19 +++++++++++++++++++ > > 2 files changed, 20 insertions(+) > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c > > index f9182f8d552f..205bbcc6af27 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c > > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c > > @@ -9,6 +9,7 @@ > > #include <linux/of.h> > > #include <linux/platform_device.h> > > > > > +#include "../../pci.h" > > Unrelated change since the new macros are left unused in the framework > of this patch. Please move it to the patch which implies using the new > defines and where the included header file content is required. I got it. I'll move this to the patch 8/21 on v15. > > #include "pcie-designware.h" > > #include <linux/pci-epc.h> > > #include <linux/pci-epf.h> > > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h > > index 2475098f6518..4be376c121a4 100644 > > --- a/drivers/pci/pci.h > > +++ b/drivers/pci/pci.h > > @@ -11,6 +11,25 @@ > > > > #define PCI_VSEC_ID_INTEL_TBT 0x1234 /* Thunderbolt */ > > > > +/* Message Routing */ > > +#define PCI_MSG_ROUTING_RC 0 > > +#define PCI_MSG_ROUTING_ADDR 1 > > +#define PCI_MSG_ROUTING_ID 2 > > +#define PCI_MSG_ROUTING_BC 3 > > +#define PCI_MSG_ROUTING_LOCAL 4 > > +#define PCI_MSG_ROUTING_GATHER 5 > > + > > +/* INTx Mechanism Messages */ > > +#define PCI_CODE_ASSERT_INTA 0x20 > > +#define PCI_CODE_ASSERT_INTB 0x21 > > +#define PCI_CODE_ASSERT_INTC 0x22 > > +#define PCI_CODE_ASSERT_INTD 0x23 > > +#define PCI_CODE_DEASSERT_INTA 0x24 > > +#define PCI_CODE_DEASSERT_INTB 0x25 > > +#define PCI_CODE_DEASSERT_INTC 0x26 > > +#define PCI_CODE_DEASSERT_INTD 0x27 > > + > > > + > > Excessive new line. Please drop it. Oops. I'll drop it. Best regards, Yoshihiro Shimoda > -Serge(y) > > > extern const unsigned char pcie_link_speed[]; > > extern bool pci_early_dump; > > > > -- > > 2.25.1 > >
diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index f9182f8d552f..205bbcc6af27 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -9,6 +9,7 @@ #include <linux/of.h> #include <linux/platform_device.h> +#include "../../pci.h" #include "pcie-designware.h" #include <linux/pci-epc.h> #include <linux/pci-epf.h> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 2475098f6518..4be376c121a4 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -11,6 +11,25 @@ #define PCI_VSEC_ID_INTEL_TBT 0x1234 /* Thunderbolt */ +/* Message Routing */ +#define PCI_MSG_ROUTING_RC 0 +#define PCI_MSG_ROUTING_ADDR 1 +#define PCI_MSG_ROUTING_ID 2 +#define PCI_MSG_ROUTING_BC 3 +#define PCI_MSG_ROUTING_LOCAL 4 +#define PCI_MSG_ROUTING_GATHER 5 + +/* INTx Mechanism Messages */ +#define PCI_CODE_ASSERT_INTA 0x20 +#define PCI_CODE_ASSERT_INTB 0x21 +#define PCI_CODE_ASSERT_INTC 0x22 +#define PCI_CODE_ASSERT_INTD 0x23 +#define PCI_CODE_DEASSERT_INTA 0x24 +#define PCI_CODE_DEASSERT_INTB 0x25 +#define PCI_CODE_DEASSERT_INTC 0x26 +#define PCI_CODE_DEASSERT_INTD 0x27 + + extern const unsigned char pcie_link_speed[]; extern bool pci_early_dump;
Add "Message Routing" and "INTx Mechanism Messages" macros to send a message by a PCIe driver. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> --- .../pci/controller/dwc/pcie-designware-ep.c | 1 + drivers/pci/pci.h | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+)