| Message ID | 20220809180051.1063653-2-willmcvicker@google.com |
|---|---|
| State | New |
| Headers | show |
| Series | PCI: dwc: Add support for 64-bit MSI target addresses | expand |
On Tue, Aug 09, 2022 at 06:00:49PM +0000, Will McVicker wrote: > Re-work the msi_msg DMA allocation logic to use dma_alloc_coherent() > which uses the coherent DMA mask to try and return an allocation within > the DMA mask limits. This allows kernel configurations that disable > ZONE_DMA32 to continue supporting a 32-bit DMA mask. Without this patch, > the PCIe host device will fail to probe when ZONE_DMA32 is disabled. > + dma_free_coherent(dev, PAGE_SIZE, pp->msi_page, pp->msi_data); Isn't msi_page a struct page * which should become a void * now? Otherwise this looks good and is what the driver should have done from the very beginning.
On 08/11/2022, Christoph Hellwig wrote: > On Tue, Aug 09, 2022 at 06:00:49PM +0000, Will McVicker wrote: > > Re-work the msi_msg DMA allocation logic to use dma_alloc_coherent() > > which uses the coherent DMA mask to try and return an allocation within > > the DMA mask limits. This allows kernel configurations that disable > > ZONE_DMA32 to continue supporting a 32-bit DMA mask. Without this patch, > > the PCIe host device will fail to probe when ZONE_DMA32 is disabled. > > > + dma_free_coherent(dev, PAGE_SIZE, pp->msi_page, pp->msi_data); > > Isn't msi_page a struct page * which should become a void * now? > > Otherwise this looks good and is what the driver should have done > from the very beginning. I've updated this in v3 to use dmam_alloc_coherent() and dropped msi_page since it's not actually used. So this block is dropped now. Thanks for taking a look though! --Will
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 7746f94a715f..0cfc3c098f13 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -272,9 +272,9 @@ static void dw_pcie_free_msi(struct dw_pcie_rp *pp) struct dw_pcie *pci = to_dw_pcie_from_pp(pp); struct device *dev = pci->dev; - dma_unmap_page(dev, pp->msi_data, PAGE_SIZE, DMA_FROM_DEVICE); - if (pp->msi_page) - __free_page(pp->msi_page); + dma_free_coherent(dev, PAGE_SIZE, pp->msi_page, pp->msi_data); + pp->msi_data = 0; + pp->msi_page = NULL; } } @@ -375,22 +375,22 @@ static int dw_pcie_msi_host_init(struct dw_pcie_rp *pp) dw_chained_msi_isr, pp); } - ret = dma_set_mask(dev, DMA_BIT_MASK(32)); + ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); if (ret) dev_warn(dev, "Failed to set DMA mask to 32-bit. Devices with only 32-bit MSI support may not work properly\n"); - pp->msi_page = alloc_page(GFP_DMA32); - pp->msi_data = dma_map_page(dev, pp->msi_page, 0, - PAGE_SIZE, DMA_FROM_DEVICE); - ret = dma_mapping_error(dev, pp->msi_data); - if (ret) { - dev_err(pci->dev, "Failed to map MSI data\n"); - __free_page(pp->msi_page); - pp->msi_page = NULL; + pp->msi_page = dma_alloc_coherent(dev, PAGE_SIZE, &pp->msi_data, + GFP_KERNEL); + if (!pp->msi_page || dma_mapping_error(dev, pp->msi_data)) { + dev_err(dev, "Failed to alloc and map MSI data\n"); + if (pp->msi_page) { + dma_free_coherent(dev, PAGE_SIZE, pp->msi_page, + pp->msi_data); + pp->msi_page = NULL; + } pp->msi_data = 0; dw_pcie_free_msi(pp); - - return ret; + return -ENOMEM; } return 0;
Re-work the msi_msg DMA allocation logic to use dma_alloc_coherent() which uses the coherent DMA mask to try and return an allocation within the DMA mask limits. This allows kernel configurations that disable ZONE_DMA32 to continue supporting a 32-bit DMA mask. Without this patch, the PCIe host device will fail to probe when ZONE_DMA32 is disabled. Fixes: 35797e672ff0 ("PCI: dwc: Fix MSI msi_msg DMA mapping") Signed-off-by: Will McVicker <willmcvicker@google.com> --- .../pci/controller/dwc/pcie-designware-host.c | 28 +++++++++---------- 1 file changed, 14 insertions(+), 14 deletions(-)