| Message ID | 20220313000824.229405-3-dmitry.baryshkov@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | PCI: qcom: rework pipe_clk/pipe_clk_src handling | expand |
On Sat 12 Mar 18:08 CST 2022, Dmitry Baryshkov wrote: > Use newly defined clk_regmap_mux_safe_ops for PCIe pipe clocks to let > the clock framework automatically park the clock when the clock is > switched off and restore the parent when the clock is switched on. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- > drivers/clk/qcom/gcc-sm8450.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/qcom/gcc-sm8450.c b/drivers/clk/qcom/gcc-sm8450.c > index 593a195467ff..a5323d20bc0d 100644 > --- a/drivers/clk/qcom/gcc-sm8450.c > +++ b/drivers/clk/qcom/gcc-sm8450.c > @@ -243,13 +243,14 @@ static struct clk_regmap_mux gcc_pcie_0_pipe_clk_src = { > .reg = 0x7b060, > .shift = 0, > .width = 2, > + .safe_src_index = 2, > .parent_map = gcc_parent_map_4, > .clkr = { > .hw.init = &(struct clk_init_data){ > .name = "gcc_pcie_0_pipe_clk_src", > .parent_data = gcc_parent_data_4, > .num_parents = ARRAY_SIZE(gcc_parent_data_4), > - .ops = &clk_regmap_mux_closest_ops, > + .ops = &clk_regmap_mux_safe_ops, > }, > }, > }; > @@ -273,13 +274,14 @@ static struct clk_regmap_mux gcc_pcie_1_pipe_clk_src = { > .reg = 0x9d064, > .shift = 0, > .width = 2, > + .safe_src_index = 2, > .parent_map = gcc_parent_map_6, > .clkr = { > .hw.init = &(struct clk_init_data){ > .name = "gcc_pcie_1_pipe_clk_src", > .parent_data = gcc_parent_data_6, > .num_parents = ARRAY_SIZE(gcc_parent_data_6), > - .ops = &clk_regmap_mux_closest_ops, > + .ops = &clk_regmap_mux_safe_ops, > }, > }, > }; > -- > 2.34.1 >
diff --git a/drivers/clk/qcom/gcc-sm8450.c b/drivers/clk/qcom/gcc-sm8450.c index 593a195467ff..a5323d20bc0d 100644 --- a/drivers/clk/qcom/gcc-sm8450.c +++ b/drivers/clk/qcom/gcc-sm8450.c @@ -243,13 +243,14 @@ static struct clk_regmap_mux gcc_pcie_0_pipe_clk_src = { .reg = 0x7b060, .shift = 0, .width = 2, + .safe_src_index = 2, .parent_map = gcc_parent_map_4, .clkr = { .hw.init = &(struct clk_init_data){ .name = "gcc_pcie_0_pipe_clk_src", .parent_data = gcc_parent_data_4, .num_parents = ARRAY_SIZE(gcc_parent_data_4), - .ops = &clk_regmap_mux_closest_ops, + .ops = &clk_regmap_mux_safe_ops, }, }, }; @@ -273,13 +274,14 @@ static struct clk_regmap_mux gcc_pcie_1_pipe_clk_src = { .reg = 0x9d064, .shift = 0, .width = 2, + .safe_src_index = 2, .parent_map = gcc_parent_map_6, .clkr = { .hw.init = &(struct clk_init_data){ .name = "gcc_pcie_1_pipe_clk_src", .parent_data = gcc_parent_data_6, .num_parents = ARRAY_SIZE(gcc_parent_data_6), - .ops = &clk_regmap_mux_closest_ops, + .ops = &clk_regmap_mux_safe_ops, }, }, };
Use newly defined clk_regmap_mux_safe_ops for PCIe pipe clocks to let the clock framework automatically park the clock when the clock is switched off and restore the parent when the clock is switched on. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/clk/qcom/gcc-sm8450.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)