From patchwork Wed Jan 12 09:42:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 1578944 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4JYjKg3f1Cz9s0r for ; Wed, 12 Jan 2022 20:43:03 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349438AbiALJnB (ORCPT ); Wed, 12 Jan 2022 04:43:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237055AbiALJm7 (ORCPT ); Wed, 12 Jan 2022 04:42:59 -0500 Received: from mout-u-204.mailbox.org (mout-u-204.mailbox.org [IPv6:2001:67c:2050:1::465:204]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ACA6AC061748 for ; Wed, 12 Jan 2022 01:42:59 -0800 (PST) Received: from smtp202.mailbox.org (unknown [91.198.250.118]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-204.mailbox.org (Postfix) with ESMTPS id 4JYjKX3BgjzQkBc; Wed, 12 Jan 2022 10:42:56 +0100 (CET) X-Virus-Scanned: amavisd-new at heinlein-support.de From: Stefan Roese To: linux-pci@vger.kernel.org Cc: Bharat Kumar Gogada , Bjorn Helgaas , =?utf-8?q?Pali_Roh=C3=A1r?= , Michal Simek Subject: [RESEND PATCH v2 1/4] PCI: Add setup_platform_service_irq hook to struct pci_host_bridge Date: Wed, 12 Jan 2022 10:42:48 +0100 Message-Id: <20220112094251.1271531-1-sr@denx.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bharat Kumar Gogada As per section 6.2.4.1.2, 6.2.6 in PCIe r4.0 error interrupts can be delivered with platform specific interrupt lines. Add setup_platform_service_irq hook to struct pci_host_bridge. Some platforms have dedicated interrupt line from root complex to interrupt controller for PCIe services like AER. This hook is to register platform IRQ's to PCIe port services. Signed-off-by: Bharat Kumar Gogada Signed-off-by: Stefan Roese Tested-by: Stefan Roese Cc: Bjorn Helgaas Cc: Pali Rohár Cc: Michal Simek --- include/linux/pci.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/pci.h b/include/linux/pci.h index 18a75c8e615c..291eadade811 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -554,6 +554,8 @@ struct pci_host_bridge { u8 (*swizzle_irq)(struct pci_dev *, u8 *); /* Platform IRQ swizzler */ int (*map_irq)(const struct pci_dev *, u8, u8); void (*release_fn)(struct pci_host_bridge *); + void (*setup_platform_service_irq)(struct pci_host_bridge *, int *, + int); void *release_data; unsigned int ignore_reset_delay:1; /* For entire hierarchy */ unsigned int no_ext_tags:1; /* No Extended Tags */