| Message ID | 20211126083119.16570-2-kishon@ti.com |
|---|---|
| State | New |
| Headers | show |
| Series | PCI: Keystone: Misc fixes for TI's AM65x PCIe | expand |
On Fri, 26 Nov 2021 14:01:15 +0530, Kishon Vijay Abraham I wrote: > Fix binding documentation of "ti,syscon-pcie-id" and "ti,syscon-pcie-mode" > to take phandle with argument. The argument is the register offset within > "syscon" used to configure PCIe controller. Similar change for j721e is > discussed in [1] > > [1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com > > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > --- > .../devicetree/bindings/pci/ti,am65-pci-ep.yaml | 8 ++++++-- > .../bindings/pci/ti,am65-pci-host.yaml | 16 ++++++++++++---- > 2 files changed, 18 insertions(+), 6 deletions(-) > Running 'make dtbs_check' with the schema in this patch gives the following warnings. Consider if they are expected or the schema is incorrect. These may not be new warnings. Note that it is not yet a requirement to have 0 warnings for dtbs_check. This will change in the future. Full log is available here: https://patchwork.ozlabs.org/patch/1559994 pcie@21020000: compatible: Additional items are not allowed ('snps,dw-pcie' was unexpected) arch/arm/boot/dts/keystone-k2e-evm.dt.yaml pcie@21020000: compatible: ['ti,keystone-pcie', 'snps,dw-pcie'] is too long arch/arm/boot/dts/keystone-k2e-evm.dt.yaml pcie@21020000: reg: [[553783296, 8192], [553779200, 4096], [39977256, 4]] is too short arch/arm/boot/dts/keystone-k2e-evm.dt.yaml pcie@21800000: compatible: Additional items are not allowed ('snps,dw-pcie' was unexpected) arch/arm/boot/dts/keystone-k2e-evm.dt.yaml arch/arm/boot/dts/keystone-k2hk-evm.dt.yaml arch/arm/boot/dts/keystone-k2l-evm.dt.yaml pcie@21800000: compatible: ['ti,keystone-pcie', 'snps,dw-pcie'] is too long arch/arm/boot/dts/keystone-k2e-evm.dt.yaml arch/arm/boot/dts/keystone-k2hk-evm.dt.yaml arch/arm/boot/dts/keystone-k2l-evm.dt.yaml pcie@21800000: reg: [[562040832, 8192], [562036736, 4096], [39977256, 4]] is too short arch/arm/boot/dts/keystone-k2e-evm.dt.yaml arch/arm/boot/dts/keystone-k2hk-evm.dt.yaml arch/arm/boot/dts/keystone-k2l-evm.dt.yaml pcie@5500000: ti,syscon-pcie-id:0: [52] is too short arch/arm64/boot/dts/ti/k3-am654-base-board.dt.yaml pcie@5500000: ti,syscon-pcie-id:0: [60] is too short arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dt.yaml arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dt.yaml pcie@5500000: ti,syscon-pcie-id:0: [61] is too short arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dt.yaml arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dt.yaml pcie@5500000: ti,syscon-pcie-mode:0: [53] is too short arch/arm64/boot/dts/ti/k3-am654-base-board.dt.yaml pcie@5500000: ti,syscon-pcie-mode:0: [61] is too short arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dt.yaml arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dt.yaml pcie@5500000: ti,syscon-pcie-mode:0: [62] is too short arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dt.yaml arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dt.yaml pcie@5600000: ti,syscon-pcie-id:0: [52] is too short arch/arm64/boot/dts/ti/k3-am654-base-board.dt.yaml pcie@5600000: ti,syscon-pcie-id:0: [60] is too short arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dt.yaml arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dt.yaml pcie@5600000: ti,syscon-pcie-id:0: [61] is too short arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dt.yaml arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dt.yaml pcie@5600000: ti,syscon-pcie-mode:0: [55] is too short arch/arm64/boot/dts/ti/k3-am654-base-board.dt.yaml pcie@5600000: ti,syscon-pcie-mode:0: [63] is too short arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dt.yaml arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dt.yaml pcie@5600000: ti,syscon-pcie-mode:0: [64] is too short arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dt.yaml arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dt.yaml pcie-ep@5500000: ti,syscon-pcie-mode:0: [53] is too short arch/arm64/boot/dts/ti/k3-am654-base-board.dt.yaml pcie-ep@5500000: ti,syscon-pcie-mode:0: [61] is too short arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dt.yaml arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dt.yaml pcie-ep@5500000: ti,syscon-pcie-mode:0: [62] is too short arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dt.yaml arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dt.yaml pcie-ep@5600000: ti,syscon-pcie-mode:0: [55] is too short arch/arm64/boot/dts/ti/k3-am654-base-board.dt.yaml pcie-ep@5600000: ti,syscon-pcie-mode:0: [63] is too short arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dt.yaml arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dt.yaml pcie-ep@5600000: ti,syscon-pcie-mode:0: [64] is too short arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dt.yaml arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dt.yaml
Hi Rob, On 28/11/21 4:43 am, Rob Herring wrote: > On Fri, 26 Nov 2021 14:01:15 +0530, Kishon Vijay Abraham I wrote: >> Fix binding documentation of "ti,syscon-pcie-id" and "ti,syscon-pcie-mode" >> to take phandle with argument. The argument is the register offset within >> "syscon" used to configure PCIe controller. Similar change for j721e is >> discussed in [1] >> >> [1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com >> >> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> >> --- >> .../devicetree/bindings/pci/ti,am65-pci-ep.yaml | 8 ++++++-- >> .../bindings/pci/ti,am65-pci-host.yaml | 16 ++++++++++++---- >> 2 files changed, 18 insertions(+), 6 deletions(-) >> > > Running 'make dtbs_check' with the schema in this patch gives the > following warnings. Consider if they are expected or the schema is > incorrect. These may not be new warnings. > > Note that it is not yet a requirement to have 0 warnings for dtbs_check. > This will change in the future. Once this series is merged, I'll send an update to the device tree files. Without the corresponding driver changes, update to DT will break functionality. Thanks, Kishon > > Full log is available here: https://patchwork.ozlabs.org/patch/1559994 > > > pcie@21020000: compatible: Additional items are not allowed ('snps,dw-pcie' was unexpected) > arch/arm/boot/dts/keystone-k2e-evm.dt.yaml > > pcie@21020000: compatible: ['ti,keystone-pcie', 'snps,dw-pcie'] is too long > arch/arm/boot/dts/keystone-k2e-evm.dt.yaml > > pcie@21020000: reg: [[553783296, 8192], [553779200, 4096], [39977256, 4]] is too short > arch/arm/boot/dts/keystone-k2e-evm.dt.yaml > > pcie@21800000: compatible: Additional items are not allowed ('snps,dw-pcie' was unexpected) > arch/arm/boot/dts/keystone-k2e-evm.dt.yaml > arch/arm/boot/dts/keystone-k2hk-evm.dt.yaml > arch/arm/boot/dts/keystone-k2l-evm.dt.yaml > > pcie@21800000: compatible: ['ti,keystone-pcie', 'snps,dw-pcie'] is too long > arch/arm/boot/dts/keystone-k2e-evm.dt.yaml > arch/arm/boot/dts/keystone-k2hk-evm.dt.yaml > arch/arm/boot/dts/keystone-k2l-evm.dt.yaml > > pcie@21800000: reg: [[562040832, 8192], [562036736, 4096], [39977256, 4]] is too short > arch/arm/boot/dts/keystone-k2e-evm.dt.yaml > arch/arm/boot/dts/keystone-k2hk-evm.dt.yaml > arch/arm/boot/dts/keystone-k2l-evm.dt.yaml > > pcie@5500000: ti,syscon-pcie-id:0: [52] is too short > arch/arm64/boot/dts/ti/k3-am654-base-board.dt.yaml > > pcie@5500000: ti,syscon-pcie-id:0: [60] is too short > arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dt.yaml > arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dt.yaml > > pcie@5500000: ti,syscon-pcie-id:0: [61] is too short > arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dt.yaml > arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dt.yaml > > pcie@5500000: ti,syscon-pcie-mode:0: [53] is too short > arch/arm64/boot/dts/ti/k3-am654-base-board.dt.yaml > > pcie@5500000: ti,syscon-pcie-mode:0: [61] is too short > arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dt.yaml > arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dt.yaml > > pcie@5500000: ti,syscon-pcie-mode:0: [62] is too short > arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dt.yaml > arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dt.yaml > > pcie@5600000: ti,syscon-pcie-id:0: [52] is too short > arch/arm64/boot/dts/ti/k3-am654-base-board.dt.yaml > > pcie@5600000: ti,syscon-pcie-id:0: [60] is too short > arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dt.yaml > arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dt.yaml > > pcie@5600000: ti,syscon-pcie-id:0: [61] is too short > arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dt.yaml > arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dt.yaml > > pcie@5600000: ti,syscon-pcie-mode:0: [55] is too short > arch/arm64/boot/dts/ti/k3-am654-base-board.dt.yaml > > pcie@5600000: ti,syscon-pcie-mode:0: [63] is too short > arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dt.yaml > arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dt.yaml > > pcie@5600000: ti,syscon-pcie-mode:0: [64] is too short > arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dt.yaml > arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dt.yaml > > pcie-ep@5500000: ti,syscon-pcie-mode:0: [53] is too short > arch/arm64/boot/dts/ti/k3-am654-base-board.dt.yaml > > pcie-ep@5500000: ti,syscon-pcie-mode:0: [61] is too short > arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dt.yaml > arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dt.yaml > > pcie-ep@5500000: ti,syscon-pcie-mode:0: [62] is too short > arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dt.yaml > arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dt.yaml > > pcie-ep@5600000: ti,syscon-pcie-mode:0: [55] is too short > arch/arm64/boot/dts/ti/k3-am654-base-board.dt.yaml > > pcie-ep@5600000: ti,syscon-pcie-mode:0: [63] is too short > arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dt.yaml > arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dt.yaml > > pcie-ep@5600000: ti,syscon-pcie-mode:0: [64] is too short > arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-pg2.dt.yaml > arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dt.yaml >
On Fri, 26 Nov 2021 14:01:15 +0530, Kishon Vijay Abraham I wrote: > Fix binding documentation of "ti,syscon-pcie-id" and "ti,syscon-pcie-mode" > to take phandle with argument. The argument is the register offset within > "syscon" used to configure PCIe controller. Similar change for j721e is > discussed in [1] > > [1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com > > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > --- > .../devicetree/bindings/pci/ti,am65-pci-ep.yaml | 8 ++++++-- > .../bindings/pci/ti,am65-pci-host.yaml | 16 ++++++++++++---- > 2 files changed, 18 insertions(+), 6 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/pci/ti,am65-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,am65-pci-ep.yaml index 78c217d362a7..98d933b792e7 100644 --- a/Documentation/devicetree/bindings/pci/ti,am65-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/ti,am65-pci-ep.yaml @@ -32,8 +32,12 @@ properties: maxItems: 1 ti,syscon-pcie-mode: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: Phandle to the SYSCON entry + - description: pcie_ctrl register offset within SYSCON description: Phandle to the SYSCON entry required for configuring PCIe in RC or EP mode. - $ref: /schemas/types.yaml#/definitions/phandle interrupts: minItems: 1 @@ -65,7 +69,7 @@ examples: <0x5506000 0x1000>; reg-names = "app", "dbics", "addr_space", "atu"; power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>; - ti,syscon-pcie-mode = <&pcie0_mode>; + ti,syscon-pcie-mode = <&scm_conf 0x4060>; num-ib-windows = <16>; num-ob-windows = <16>; max-link-speed = <2>; diff --git a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml index 834dc1c1743c..f909e262f593 100644 --- a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml @@ -33,12 +33,20 @@ properties: maxItems: 1 ti,syscon-pcie-id: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: Phandle to the SYSCON entry + - description: pcie_device_id register offset within SYSCON description: Phandle to the SYSCON entry required for getting PCIe device/vendor ID - $ref: /schemas/types.yaml#/definitions/phandle ti,syscon-pcie-mode: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: Phandle to the SYSCON entry + - description: pcie_ctrl register offset within SYSCON description: Phandle to the SYSCON entry required for configuring PCIe in RC or EP mode. - $ref: /schemas/types.yaml#/definitions/phandle msi-map: true @@ -84,8 +92,8 @@ examples: #size-cells = <2>; ranges = <0x81000000 0 0 0x10020000 0 0x00010000>, <0x82000000 0 0x10030000 0x10030000 0 0x07FD0000>; - ti,syscon-pcie-id = <&pcie_devid>; - ti,syscon-pcie-mode = <&pcie0_mode>; + ti,syscon-pcie-id = <&scm_conf 0x0210>; + ti,syscon-pcie-mode = <&scm_conf 0x4060>; bus-range = <0x0 0xff>; num-viewport = <16>; max-link-speed = <2>;
Fix binding documentation of "ti,syscon-pcie-id" and "ti,syscon-pcie-mode" to take phandle with argument. The argument is the register offset within "syscon" used to configure PCIe controller. Similar change for j721e is discussed in [1] [1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- .../devicetree/bindings/pci/ti,am65-pci-ep.yaml | 8 ++++++-- .../bindings/pci/ti,am65-pci-host.yaml | 16 ++++++++++++---- 2 files changed, 18 insertions(+), 6 deletions(-)