Message ID | 20200722110317.4744-4-kishon@ti.com |
---|---|
State | New |
Headers | show
Return-Path: <linux-pci-owner@vger.kernel.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=jjalxO1u; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BBXdy6FjVz9sQt for <incoming@patchwork.ozlabs.org>; Wed, 22 Jul 2020 21:04:06 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731876AbgGVLDs (ORCPT <rfc822;incoming@patchwork.ozlabs.org>); Wed, 22 Jul 2020 07:03:48 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:56238 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726153AbgGVLDp (ORCPT <rfc822;linux-pci@vger.kernel.org>); Wed, 22 Jul 2020 07:03:45 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 06MB3Y4v072362; Wed, 22 Jul 2020 06:03:34 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1595415814; bh=w0kKvgPWtxpR8/SJqvDyB4niiNZZhzWW1VwYSFg/2R8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jjalxO1usBxIfW8F6Bho+AhYHdORJ2k6jsn5x4xrN5p+SWR/vrKhOscARd0U5x8aX VqzySlD8CYe/6xPHi5/uGjR7tmX/zNoWRC1qSKgHIxuQcAkQRRIvlaaNF0GyJq211f lPNJxrhKRu1A2BhwdvMhoCAzlm8jAYcL6YScurIU= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 06MB3Ywm051615; Wed, 22 Jul 2020 06:03:34 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 22 Jul 2020 06:03:34 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 22 Jul 2020 06:03:34 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 06MB3IFb078616; Wed, 22 Jul 2020 06:03:30 -0500 From: Kishon Vijay Abraham I <kishon@ti.com> To: Tom Joseph <tjoseph@cadence.com>, Bjorn Helgaas <bhelgaas@google.com>, Rob Herring <robh+dt@kernel.org>, Kishon Vijay Abraham I <kishon@ti.com>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Arnd Bergmann <arnd@arndb.de> CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org>, <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-omap@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org> Subject: [PATCH v8 03/15] linux/kernel.h: Add PTR_ALIGN_DOWN macro Date: Wed, 22 Jul 2020 16:33:05 +0530 Message-ID: <20200722110317.4744-4-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200722110317.4744-1-kishon@ti.com> References: <20200722110317.4744-1-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: <linux-pci.vger.kernel.org> X-Mailing-List: linux-pci@vger.kernel.org |
Series |
Add PCIe support to TI's J721E SoC
|
expand
|
diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 82d91547d122..7339a00c895e 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -34,6 +34,7 @@ #define ALIGN_DOWN(x, a) __ALIGN_KERNEL((x) - ((a) - 1), (a)) #define __ALIGN_MASK(x, mask) __ALIGN_KERNEL_MASK((x), (mask)) #define PTR_ALIGN(p, a) ((typeof(p))ALIGN((unsigned long)(p), (a))) +#define PTR_ALIGN_DOWN(p, a) ((typeof(p))ALIGN_DOWN((unsigned long)(p), (a))) #define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0) /* generic data direction definitions */