@@ -71,7 +71,7 @@ int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
if (ret)
return PCIBIOS_DEVICE_NOT_FOUND;
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int rtas_pci_read_config(struct pci_bus *bus,
@@ -121,7 +121,7 @@ int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
if (ret)
return PCIBIOS_DEVICE_NOT_FOUND;
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int rtas_pci_write_config(struct pci_bus *bus,
@@ -1652,7 +1652,7 @@ static int ppc4xx_pciex_read_config(struct pci_bus *bus, unsigned int devfn,
dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int ppc4xx_pciex_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -1696,7 +1696,7 @@ static int ppc4xx_pciex_write_config(struct pci_bus *bus, unsigned int devfn,
dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops ppc4xx_pciex_pci_ops =
@@ -44,7 +44,7 @@ static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
*val = ret;
- return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+ return rval ? PCIBIOS_DEVICE_NOT_FOUND : 0;
}
static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -58,7 +58,7 @@ static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
addr, len, val);
- return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+ return rval ? PCIBIOS_DEVICE_NOT_FOUND : 0;
}
static struct pci_ops rtas_pci_ops = {
@@ -157,7 +157,7 @@ mpc52xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
out_be32(hose->cfg_addr, 0);
mb();
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int
@@ -221,7 +221,7 @@ mpc52xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,
out_be32(hose->cfg_addr, 0);
mb();
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops mpc52xx_pci_ops = {
@@ -40,7 +40,7 @@ static int pq2_pci_exclude_device(struct pci_controller *hose,
if (bus == 0 && PCI_SLOT(devfn) == 0)
return PCIBIOS_DEVICE_NOT_FOUND;
else
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static void __init pq2_pci_add_bridge(struct device_node *np)
@@ -76,7 +76,7 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
if ((bus == 0) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
return PCIBIOS_DEVICE_NOT_FOUND;
else
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int mpc85xx_cds_restart(struct notifier_block *this,
@@ -118,7 +118,7 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
if (hose->dn == pci_with_uli)
return uli_exclude_device(hose, bus, devfn);
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
#endif /* CONFIG_PCI */
@@ -49,7 +49,7 @@ static int mpc86xx_exclude_device(struct pci_controller *hose,
if (hose->dn == fsl_pci_primary)
return uli_exclude_device(hose, bus, devfn);
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
#endif /* CONFIG_PCI */
@@ -55,7 +55,7 @@ static int gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
*val = in_le32(cfg_data);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
@@ -82,7 +82,7 @@ static int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
out_le32(cfg_data, val);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops gg2_pci_ops =
@@ -106,7 +106,7 @@ static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
*val = ret;
- return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
+ return rval ? PCIBIOS_DEVICE_NOT_FOUND : 0;
}
static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
@@ -120,7 +120,7 @@ static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset
rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
addr, len, val);
- return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
+ return rval ? PCIBIOS_DEVICE_NOT_FOUND : 0;
}
static struct pci_ops rtas_pci_ops =
@@ -47,7 +47,7 @@ static int holly_exclude_device(struct pci_controller *hose, u_char bus,
if (bus == 0 && PCI_SLOT(devfn) == 0)
return PCIBIOS_DEVICE_NOT_FOUND;
else
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static void holly_remap_bridge(void)
@@ -55,7 +55,7 @@ int mpc7448_hpc2_exclude_device(struct pci_controller *hose,
if (bus == 0 && PCI_SLOT(devfn) == 0)
return PCIBIOS_DEVICE_NOT_FOUND;
else
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static void __init mpc7448_hpc2_setup_arch(void)
@@ -353,5 +353,5 @@ int uli_exclude_device(struct pci_controller *hose,
return PCIBIOS_DEVICE_NOT_FOUND;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
@@ -142,7 +142,7 @@ static int u3_agp_read_config(struct pci_bus *bus, unsigned int devfn,
*val = in_le32(addr);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int u3_agp_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -173,7 +173,7 @@ static int u3_agp_write_config(struct pci_bus *bus, unsigned int devfn,
out_le32(addr, val);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops u3_agp_pci_ops =
@@ -223,7 +223,7 @@ static int u3_ht_root_read_config(struct pci_controller *hose, u8 offset,
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int u3_ht_root_write_config(struct pci_controller *hose, u8 offset,
@@ -234,7 +234,7 @@ static int u3_ht_root_write_config(struct pci_controller *hose, u8 offset,
addr = hose->cfg_addr + ((offset & ~3) << 2) + (4 - len - (offset & 3));
if (offset >= PCI_BASE_ADDRESS_0 && offset < PCI_CAPABILITY_LIST)
- return PCIBIOS_SUCCESSFUL;
+ return 0;
switch (len) {
case 1:
@@ -248,7 +248,7 @@ static int u3_ht_root_write_config(struct pci_controller *hose, u8 offset,
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
@@ -286,7 +286,7 @@ static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
*val = in_le32(addr);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -323,7 +323,7 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
out_le32(addr, val);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops u3_ht_pci_ops =
@@ -397,7 +397,7 @@ static int u4_pcie_read_config(struct pci_bus *bus, unsigned int devfn,
*val = in_le32(addr);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
int offset, int len, u32 val)
@@ -428,7 +428,7 @@ static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
out_le32(addr, val);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops u4_pcie_pci_ops =
@@ -166,7 +166,7 @@ static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
return PCIBIOS_BAD_REGISTER_NUMBER;
if (workaround_5945(bus, devfn, offset, len, val))
- return PCIBIOS_SUCCESSFUL;
+ return 0;
addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
@@ -188,7 +188,7 @@ static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -223,7 +223,7 @@ static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn,
out_le32(addr, val);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops pa_pxp_ops = {
@@ -307,7 +307,7 @@ static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
default:
*val = 0xfffffffful; break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
default:
return PCIBIOS_DEVICE_NOT_FOUND;
}
@@ -327,7 +327,7 @@ static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
*val = swap ? in_le32(addr) : in_be32(addr);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -350,7 +350,7 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
case 0:
break;
case 1:
- return PCIBIOS_SUCCESSFUL;
+ return 0;
default:
return PCIBIOS_DEVICE_NOT_FOUND;
}
@@ -370,7 +370,7 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
swap ? out_le32(addr, val) : out_be32(addr, val);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops u3_ht_pci_ops =
@@ -318,7 +318,7 @@ static int pnv_eeh_find_ecap(struct pci_dn *pdn, int cap)
if (!edev || !edev->pcie_cap)
return 0;
- if (pnv_pci_cfg_read(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
+ if (pnv_pci_cfg_read(pdn, pos, 4, &header) != 0)
return 0;
else if (!header)
return 0;
@@ -331,7 +331,7 @@ static int pnv_eeh_find_ecap(struct pci_dn *pdn, int cap)
if (pos < 256)
break;
- if (pnv_pci_cfg_read(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
+ if (pnv_pci_cfg_read(pdn, pos, 4, &header) != 0)
break;
}
@@ -685,7 +685,7 @@ int pnv_pci_cfg_read(struct pci_dn *pdn,
pr_devel("%s: bus: %x devfn: %x +%x/%x -> %08x\n",
__func__, pdn->busno, pdn->devfn, where, size, *val);
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
int pnv_pci_cfg_write(struct pci_dn *pdn,
@@ -710,7 +710,7 @@ int pnv_pci_cfg_write(struct pci_dn *pdn,
return PCIBIOS_FUNC_NOT_SUPPORTED;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
#if CONFIG_EEH
@@ -200,7 +200,7 @@ static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
if (!edev || !edev->pcie_cap)
return 0;
- if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
+ if (rtas_read_config(pdn, pos, 4, &header) != 0)
return 0;
else if (!header)
return 0;
@@ -213,7 +213,7 @@ static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
if (pos < 256)
break;
- if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
+ if (rtas_read_config(pdn, pos, 4, &header) != 0)
break;
}
@@ -697,7 +697,7 @@ static int mpc83xx_pcie_exclude_device(struct pci_bus *bus, unsigned int devfn)
return PCIBIOS_DEVICE_NOT_FOUND;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static void __iomem *mpc83xx_pcie_remap_cfg(struct pci_bus *bus,
@@ -70,7 +70,7 @@ int __indirect_read_config(struct pci_controller *hose,
*val = in_le32(cfg_data);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
int indirect_read_config(struct pci_bus *bus, unsigned int devfn,
@@ -148,7 +148,7 @@ int indirect_write_config(struct pci_bus *bus, unsigned int devfn,
out_le32(cfg_data, val);
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
static struct pci_ops indirect_pci_ops =
@@ -78,7 +78,7 @@ tsi108_direct_write_config(struct pci_bus *bus, unsigned int devfunc,
break;
}
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
void tsi108_clear_pci_error(u32 pci_cfg_base)
@@ -167,7 +167,7 @@ tsi108_direct_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
printk("data = 0x%x\n", *val);
}
#endif
- return PCIBIOS_SUCCESSFUL;
+ return 0;
}
void tsi108_clear_pci_cfg_error(void)
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept. Their scope should be limited within arch/x86. Change all PCIBIOS_SUCCESSFUL to 0 Signed-off-by: "Saheed O. Bolarinwa" <refactormyself@gmail.com> --- arch/powerpc/kernel/rtas_pci.c | 4 ++-- arch/powerpc/platforms/4xx/pci.c | 4 ++-- arch/powerpc/platforms/52xx/efika.c | 4 ++-- arch/powerpc/platforms/52xx/mpc52xx_pci.c | 4 ++-- arch/powerpc/platforms/82xx/pq2.c | 2 +- arch/powerpc/platforms/85xx/mpc85xx_cds.c | 2 +- arch/powerpc/platforms/85xx/mpc85xx_ds.c | 2 +- arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 2 +- arch/powerpc/platforms/chrp/pci.c | 8 ++++---- arch/powerpc/platforms/embedded6xx/holly.c | 2 +- .../platforms/embedded6xx/mpc7448_hpc2.c | 2 +- arch/powerpc/platforms/fsl_uli1575.c | 2 +- arch/powerpc/platforms/maple/pci.c | 18 +++++++++--------- arch/powerpc/platforms/pasemi/pci.c | 6 +++--- arch/powerpc/platforms/powermac/pci.c | 8 ++++---- arch/powerpc/platforms/powernv/eeh-powernv.c | 4 ++-- arch/powerpc/platforms/powernv/pci.c | 4 ++-- arch/powerpc/platforms/pseries/eeh_pseries.c | 4 ++-- arch/powerpc/sysdev/fsl_pci.c | 2 +- arch/powerpc/sysdev/indirect_pci.c | 4 ++-- arch/powerpc/sysdev/tsi108_pci.c | 4 ++-- 21 files changed, 46 insertions(+), 46 deletions(-)