Message ID | 20190604131516.13596-6-kishon@ti.com |
---|---|
State | New |
Delegated to: | Lorenzo Pieralisi |
Headers | show
Return-Path: <linux-pci-owner@vger.kernel.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="FZrwJCy0"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45JCC40sRsz9sDX for <incoming@patchwork.ozlabs.org>; Tue, 4 Jun 2019 23:17:36 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727530AbfFDNRc (ORCPT <rfc822;incoming@patchwork.ozlabs.org>); Tue, 4 Jun 2019 09:17:32 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:54854 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727480AbfFDNRb (ORCPT <rfc822;linux-pci@vger.kernel.org>); Tue, 4 Jun 2019 09:17:31 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x54DHD1u027960; Tue, 4 Jun 2019 08:17:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1559654233; bh=gskYCXt69auxdl0gJm5PmVmDCrGNb92GxmcQN4v//vI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=FZrwJCy0oF0940yJ1Ges+n6/f/6gfkwi/N2rjMaSwcFAhzwrUyrlOK/UTy3CHL+b4 FfHYPO+7aXQbd9He0w5ngaEoaMUIH8tBK354E0FwyLdaZ3IDNCJllHtlFmT+4JIFrf SaqAqv6a8M87X221Mal/XQziW2sjRBOIqRkwxTXs= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x54DHDRb042475 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 4 Jun 2019 08:17:13 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 4 Jun 2019 08:17:12 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 4 Jun 2019 08:17:12 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x54DGdGL098972; Tue, 4 Jun 2019 08:17:07 -0500 From: Kishon Vijay Abraham I <kishon@ti.com> To: Tom Joseph <tjoseph@cadence.com>, Bjorn Helgaas <bhelgaas@google.com>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Arnd Bergmann <arnd@arndb.de>, Gustavo Pimentel <gustavo.pimentel@synopsys.com> CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Frank Rowand <frowand.list@gmail.com>, Jingoo Han <jingoohan1@gmail.com>, <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-omap@vger.kernel.org>, <linux-rockchip@lists.infradead.org>, <linux-arm-kernel@lists.infradead.org>, Kishon Vijay Abraham I <kishon@ti.com> Subject: [RFC PATCH 05/30] linux/kernel.h: Add PTR_ALIGN_DOWN macro Date: Tue, 4 Jun 2019 18:44:51 +0530 Message-ID: <20190604131516.13596-6-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190604131516.13596-1-kishon@ti.com> References: <20190604131516.13596-1-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: <linux-pci.vger.kernel.org> X-Mailing-List: linux-pci@vger.kernel.org |
Series |
Add PCIe support to TI's J721E SoC
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expand
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diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 74b1ee9027f5..f5be987f1f95 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -34,6 +34,7 @@ #define ALIGN_DOWN(x, a) __ALIGN_KERNEL((x) - ((a) - 1), (a)) #define __ALIGN_MASK(x, mask) __ALIGN_KERNEL_MASK((x), (mask)) #define PTR_ALIGN(p, a) ((typeof(p))ALIGN((unsigned long)(p), (a))) +#define PTR_ALIGN_DOWN(p, a) ((typeof(p))ALIGN_DOWN((unsigned long)(p), (a))) #define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0) /* generic data direction definitions */
Add a macro for aligning down a pointer. This is useful to get an aligned register address when a device allows only word access and doesn't allow half word or byte access. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- include/linux/kernel.h | 1 + 1 file changed, 1 insertion(+)