| Message ID | 20180905203546.21921-19-keith.busch@intel.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
| Series | PCI, error handling and hot plug | expand |
diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c index 70cb1e65a311..0aa0d01562bf 100644 --- a/drivers/pci/pcie/dpc.c +++ b/drivers/pci/pcie/dpc.c @@ -92,6 +92,10 @@ static pci_ers_result_t dpc_reset_link(struct pci_dev *pdev) pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS, PCI_EXP_DPC_STATUS_TRIGGER); + + if (!pcie_wait_for_link(pdev, true)) + return PCI_ERS_RESULT_DISCONNECT; + if (pdev->subordinate) pdev->subordinate->error_state = pci_channel_io_normal; return PCI_ERS_RESULT_RECOVERED;
The DPC service only provides error handling now, so we don't get to rely on the PCIe hotplug driver to handling the timing requirements for when it is okay access the downstream devices. This patch adds the check for the active link before returning control to the pcie error handler after the slot reset completes. Signed-off-by: Keith Busch <keith.busch@intel.com> --- drivers/pci/pcie/dpc.c | 4 ++++ 1 file changed, 4 insertions(+)