From patchwork Fri Nov 25 10:57:18 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 699189 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3tQCj46jX4z9t9x for ; Fri, 25 Nov 2016 21:58:00 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="xcDzDVJ0"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752602AbcKYK57 (ORCPT ); Fri, 25 Nov 2016 05:57:59 -0500 Received: from mail-pg0-f65.google.com ([74.125.83.65]:32963 "EHLO mail-pg0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751261AbcKYK56 (ORCPT ); Fri, 25 Nov 2016 05:57:58 -0500 Received: by mail-pg0-f65.google.com with SMTP id 3so5327183pgd.0; Fri, 25 Nov 2016 02:57:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=v1/hHZFosa9pieLKeX1Z2+q6t0AcPS8us0jd8snaXic=; b=xcDzDVJ0Auo9thkDboSPvKRr5xDzcbBsaupngT9aY/tlesj8ut2bMLkd0ts0kKGB9q d29ywIPCpQO7wFiiOcA4+yIObp82JNVNG3F+VFRDdafZTOl2A85Znmz4ksHCf3G6kdUM LpeOLCLPpkvnjm3/wqLc367slMh/bHho6RUeKJmy0deOJj50iyviqPOI49ntjWWMm/oU 7c4TW6836pSwmnN7x8cS+66yTQf90jqoht9ARyVrrJ5986mlxUc6FPM2wK6Z+pBKbK2W MgRN64p8CKRML9/5vUvwOMu40oPA25Z6uR90rdHm51IVw0S20Y5J6oKXPpCxY8pmmT60 3Ftw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=v1/hHZFosa9pieLKeX1Z2+q6t0AcPS8us0jd8snaXic=; b=QXep+mrvF2NaSe7lRtBaPoWeB1Sd455ENaBbez33BWuATMQUQNU3k1vdeX0cxm4S92 24TE4BzOMvqUWYmAm9uy8oHUevTA3W4A7Z91lZ4136VxDsydnVGZHz79gwRZsjW5AfJM qJMD1sYc2qm3BlqFWuJ0yzBgHAR6aiCbB7HshEJZD7s4Ryr7XN0dhnfjBV7EoPlntevA 4EURdjGJyLe2CzL/roEITWTGpX2AnyIJAHykC0/my2vvFvgidWeBBySOQTv9InKNMMlc UGvNxb3hL9RTjpDcvlF7t8yZt/MhYW0jnuDdt/zuqT4yw1Z2+GLtOZAljHibgJd9GRL+ kA4A== X-Gm-Message-State: AKaTC02rO6PFufU5Z+svIl3Zv8Mxna2CSfvL8TrWhsNAUMyI9PpWfj4mVSWjEwDrkSZK+w== X-Received: by 10.98.62.73 with SMTP id l70mr7056096pfa.92.1480071478049; Fri, 25 Nov 2016 02:57:58 -0800 (PST) Received: from localhost (port-2820.pppoe.wtnet.de. [84.46.11.15]) by smtp.gmail.com with ESMTPSA id 74sm49108986pge.2.2016.11.25.02.57.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 25 Nov 2016 02:57:57 -0800 (PST) From: Thierry Reding To: Bjorn Helgaas Cc: Arnd Bergmann , Tomasz Nowicki , Liviu Dudau , Lorenzo Pieralisi , Vidya Sagar , linux-pci@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v4 10/10] arm64: tegra: Enable PCIe on Jetson TX1 Date: Fri, 25 Nov 2016 11:57:18 +0100 Message-Id: <20161125105718.3866-10-thierry.reding@gmail.com> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20161125105718.3866-1-thierry.reding@gmail.com> References: <20161125105718.3866-1-thierry.reding@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Thierry Reding Enable the x4 PCIe and M.2 Key E slots on Jetson TX1. The Key E slot is currently untested due to lack of hardware. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts index 983775e637a4..4c1ea7a08d43 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts @@ -7,6 +7,32 @@ model = "NVIDIA Jetson TX1 Developer Kit"; compatible = "nvidia,p2371-2180", "nvidia,tegra210"; + pcie-controller@01003000 { + status = "okay"; + + avdd-pll-uerefe-supply = <&avdd_1v05_pll>; + hvddio-pex-supply = <&vdd_1v8>; + dvddio-pex-supply = <&vdd_pex_1v05>; + dvdd-pex-pll-supply = <&vdd_pex_1v05>; + hvdd-pex-pll-e-supply = <&vdd_1v8>; + vddio-pex-ctl-supply = <&vdd_1v8>; + + pci@1,0 { + phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, + <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>, + <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>, + <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>; + phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3"; + status = "okay"; + }; + + pci@2,0 { + phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>; + phy-names = "pcie-0"; + status = "okay"; + }; + }; + host1x@50000000 { dsi@54300000 { status = "okay";