From patchwork Thu Aug 23 18:02:13 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 179698 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 98C912C0193 for ; Fri, 24 Aug 2012 04:02:36 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754312Ab2HWSCR (ORCPT ); Thu, 23 Aug 2012 14:02:17 -0400 Received: from mail-qa0-f74.google.com ([209.85.216.74]:46477 "EHLO mail-qa0-f74.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752101Ab2HWSCP (ORCPT ); Thu, 23 Aug 2012 14:02:15 -0400 Received: by qafl39 with SMTP id l39so129081qaf.1 for ; Thu, 23 Aug 2012 11:02:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=date:from:to:cc:subject:message-id:references:mime-version :content-type:content-disposition:in-reply-to:user-agent; bh=evOPZf7ifVOLsNSxg29WZPcw/xDThHTWPUiamptPZOU=; b=ByuXqE8LMmxNkpPoer9SVnsb4ZfnKUut39SuazLst590f6Yr7MKC4e1i+27Mppb1d3 EgebV4fn5aJCPYY1T8ofi8FRrcLJag88AFpiOY45tVxPLxN7eGfFH2GwAVINWHhVHcwr KKUYbtx+OkdiDWObJyNB3GzkIeHWuhsnzPTQckGX+Ll4CxDpPaibhD2pKI8KxYxiGl18 zzB1gvCIzJpGGKtcn7Iz6JYGfg5xEb89/7JrCbirCrQ+JVAqE9/d072glTGaSb5eiduA WAi2uKCov28hF3yo6ZvnNgCrSEaRxFAhsi5sRNqIwoMj4jTZQP4V9k8CAxv/2WtSxjwW Knzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=date:from:to:cc:subject:message-id:references:mime-version :content-type:content-disposition:in-reply-to:user-agent :x-gm-message-state; bh=evOPZf7ifVOLsNSxg29WZPcw/xDThHTWPUiamptPZOU=; b=PrBddizF6Dm6QGGZMCuhiDSnCFghSgtyZy5fhVvOskvD3NsCP2NaggpVIcEjlNjq+J Ngq0lbnj+tFCkhVSsnbS3SSmZrdMbGQySS9vTiHQ0BUK7jd8+8l/PaXhpWAaoT9oG0hO 9cPra32B3A6sSMUHesy87TqMRI5u5JrcoCtDSXECUqP29AFNnAYUCRJm5mtxtl/zGllx LBA70U3YFCzdSkV8aAdz+xWHmQJDGg5tvBVRfaQq/qRzO542YsLXbVrYFlRSXSI+QS/l gGiEBZcmG7hp5kX+uGB/X5tcP0074lpdbPx2Q0fk8IHWmRY55NAF+g94JB2IeQeqUGAH oDUg== Received: by 10.236.79.40 with SMTP id h28mr1158663yhe.48.1345744934607; Thu, 23 Aug 2012 11:02:14 -0700 (PDT) Received: by 10.236.79.40 with SMTP id h28mr1158647yhe.48.1345744934538; Thu, 23 Aug 2012 11:02:14 -0700 (PDT) Received: from wpzn3.hot.corp.google.com (216-239-44-65.google.com [216.239.44.65]) by gmr-mx.google.com with ESMTPS id y43si2198590yhi.2.2012.08.23.11.02.14 (version=TLSv1/SSLv3 cipher=AES128-SHA); Thu, 23 Aug 2012 11:02:14 -0700 (PDT) Received: from bhelgaas.mtv.corp.google.com (bhelgaas.mtv.corp.google.com [172.18.96.155]) by wpzn3.hot.corp.google.com (Postfix) with ESMTP id 5F1D4100047; Thu, 23 Aug 2012 11:02:14 -0700 (PDT) Received: by bhelgaas.mtv.corp.google.com (Postfix, from userid 131485) id 08321180664; Thu, 23 Aug 2012 11:02:13 -0700 (PDT) Date: Thu, 23 Aug 2012 12:02:13 -0600 From: Bjorn Helgaas To: Olof Johansson Cc: linux-pci@vger.kernel.org, Jacob Pan , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Jesse Barnes , Ivan Kokshaysky , Matthew Wilcox , Robert Hancock , linuxppc-dev Subject: Re: [PATCH 1/2] PCI: leave MEM and IO decoding disabled during 64-bit BAR sizing, too Message-ID: <20120823180213.GA31462@google.com> References: <20120709181745.18165.93914.stgit@bhelgaas.mtv.corp.google.com> <20120709182018.18165.98339.stgit@bhelgaas.mtv.corp.google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.20 (2009-06-14) X-Gm-Message-State: ALoCoQlTeimn313AddJNtMKJOVMwYBU97GVGur4IQyLZhhIIM1SogEfNPjsBKlOc9UtnY6d+mod8LgPIV7HfmkqUYWnhhd2sP31BItVkEaoK86etZDN5AtmB2KFCtWOXVs2zWDW+L2KDjDtwUPn1hkYp3pKMAI5QaAcoxM9Xa26n8nZdRKeuhlUAHfl2RHgns9z3ls9iBKqx9pdICY7GuDKmQTSDgYn3qQ== Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Thu, Aug 23, 2012 at 12:28:23AM -0700, Olof Johansson wrote: > Hi, > > On Mon, Jul 9, 2012 at 11:20 AM, Bjorn Helgaas wrote: > > After 253d2e5498, we disable MEM and IO decoding for most devices while we > > size 32-bit BARs. However, we restore the original COMMAND register before > > we size the upper 32 bits of 64-bit BARs, so we can still cause a conflict. > > > > This patch waits to restore the original COMMAND register until we're > > completely finished sizing the BAR. > > > > Reference: https://lkml.org/lkml/2007/8/25/154 > > Signed-off-by: Bjorn Helgaas > > This patch causes boot lockup on PA Semi hardware, since it disables > the bar on the UART that is used for console, and it has printks > between the old and the new re-enable location. If I boot with 'debug' > level for printk, I hit this. If I boot with just regular console > args, I don't. > > I'm guessing any other platform that uses MMIO-based UART on PCI for > console will have similar issues. I can verify on Chrome OS x86 > hardware tomorrow if legacy powerpc isn't important enough to care > about. :-) > > I have no proposal for a fix for this. Can you please consider > reverting for 3.6 unless someone has a better idea? Thanks a lot for finding and debugging this! Can you try the patch below? commit cfc29ece86d648e63fb46de81b2bf8e3e107672c Author: Bjorn Helgaas Date: Thu Aug 23 10:53:08 2012 -0600 PCI: Don't print anything while decoding is disabled If we try to print to the console device while its decoding is disabled, the system will hang. Reported-by: Olof Johansson Signed-off-by: Bjorn Helgaas Acked-by: Olof Johansson --- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 6c143b4..9f8a6b7 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -144,15 +144,13 @@ static inline unsigned long decode_bar(struct pci_dev *dev, u32 bar) case PCI_BASE_ADDRESS_MEM_TYPE_32: break; case PCI_BASE_ADDRESS_MEM_TYPE_1M: - dev_info(&dev->dev, "1M mem BAR treated as 32-bit BAR\n"); + /* 1M mem BAR treated as 32-bit BAR */ break; case PCI_BASE_ADDRESS_MEM_TYPE_64: flags |= IORESOURCE_MEM_64; break; default: - dev_warn(&dev->dev, - "mem unknown type %x treated as 32-bit BAR\n", - mem_type); + /* mem unknown type treated as 32-bit BAR */ break; } return flags; @@ -173,9 +171,11 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, u32 l, sz, mask; u16 orig_cmd; struct pci_bus_region region; + bool bar_too_big = false, bar_disabled = false; mask = type ? PCI_ROM_ADDRESS_MASK : ~0; + /* No printks while decoding is disabled! */ if (!dev->mmio_always_on) { pci_read_config_word(dev, PCI_COMMAND, &orig_cmd); pci_write_config_word(dev, PCI_COMMAND, @@ -240,8 +240,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, goto fail; if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) { - dev_err(&dev->dev, "reg %x: can't handle 64-bit BAR\n", - pos); + bar_too_big = true; goto fail; } @@ -252,12 +251,11 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, region.start = 0; region.end = sz64; pcibios_bus_to_resource(dev, res, ®ion); + bar_disabled = true; } else { region.start = l64; region.end = l64 + sz64; pcibios_bus_to_resource(dev, res, ®ion); - dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", - pos, res); } } else { sz = pci_size(l, sz, mask); @@ -268,18 +266,23 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, region.start = l; region.end = l + sz; pcibios_bus_to_resource(dev, res, ®ion); - - dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res); } - out: + goto out; + + +fail: + res->flags = 0; +out: if (!dev->mmio_always_on) pci_write_config_word(dev, PCI_COMMAND, orig_cmd); + if (bar_too_big) + dev_err(&dev->dev, "reg %x: can't handle 64-bit BAR\n", pos); + if (res->flags && !bar_disabled) + dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res); + return (res->flags & IORESOURCE_MEM_64) ? 1 : 0; - fail: - res->flags = 0; - goto out; } static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)