| Message ID | 1728981213-8771-2-git-send-email-hongxing.zhu@nxp.com |
|---|---|
| State | New |
| Headers | show |
| Series | A bunch of changes to refine i.MX PCIe driver | expand |
On Tue, Oct 15, 2024 at 04:33:25PM +0800, Richard Zhu wrote: > Previous reference clock of i.MX95 PCIe RC is on when system boot to > kernel. But boot firmware change the behavor, it is off when boot. So it > needs be turn on when it is used. Also it needs be turn off/on when suspend > and resume. I think this background would make more sense in patch 2. IIUC, that's where the driver behavior changes to do something with the "ref" clock. I'm not sure how to interpret "Previous reference clock of i.MX95 PCIe RC is on when system boot to kernel. But boot firmware change the behavor, it is off when boot." Does that mean a previous version of the boot firmware left the ref clock on at handoff to the OS, and newer firmware turns it off? If so, I think it would be useful to include information about the relevant firmware versions. > Add one ref clock for i.MX95 PCIe RC. Increase clocks' maxItems to 5 and keep > the same restriction with other compatible string.
On Fri, Oct 18, 2024 at 06:13:05PM -0500, Bjorn Helgaas wrote: > On Tue, Oct 15, 2024 at 04:33:25PM +0800, Richard Zhu wrote: > > Previous reference clock of i.MX95 PCIe RC is on when system boot to > > kernel. But boot firmware change the behavor, it is off when boot. So it > > needs be turn on when it is used. Also it needs be turn off/on when suspend > > and resume. > > I think this background would make more sense in patch 2. IIUC, > that's where the driver behavior changes to do something with the > "ref" clock. Yes, use "ref" clock are more reasonable because we have not consider external osc clock case at beggining. > > I'm not sure how to interpret "Previous reference clock of i.MX95 PCIe > RC is on when system boot to kernel. But boot firmware change the > behavor, it is off when boot." > > Does that mean a previous version of the boot firmware left the ref > clock on at handoff to the OS, and newer firmware turns it off? If > so, I think it would be useful to include information about the > relevant firmware versions. i.MX95 is quite new. previous version should be 'preview' boot firmware. The production version turn ref clock off. Can we simple said "preview" version. Most people should use production version, which is general avaible for public. Frank > > > Add one ref clock for i.MX95 PCIe RC. Increase clocks' maxItems to 5 and keep > > the same restriction with other compatible string.
On Fri, Oct 18, 2024 at 06:13:05PM -0500, Bjorn Helgaas wrote: > On Tue, Oct 15, 2024 at 04:33:25PM +0800, Richard Zhu wrote: > > Previous reference clock of i.MX95 PCIe RC is on when system boot to > > kernel. But boot firmware change the behavor, it is off when boot. So it > > needs be turn on when it is used. Also it needs be turn off/on when suspend > > and resume. > > I think this background would make more sense in patch 2. IIUC, > that's where the driver behavior changes to do something with the > "ref" clock. > > I'm not sure how to interpret "Previous reference clock of i.MX95 PCIe > RC is on when system boot to kernel. But boot firmware change the > behavor, it is off when boot." > > Does that mean a previous version of the boot firmware left the ref > clock on at handoff to the OS, and newer firmware turns it off? If > so, I think it would be useful to include information about the > relevant firmware versions. > Most likely that the bootloader *used to* turn on the reference clock and now it decides not to do so (for whatever reason). But ideally, the clock should be voted/enabled by the kernel irrespective of that. So the reference of 'boot firmware' is not relevant here. - Mani
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml index a8b34f58f8f4..cddbe21f99f2 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml @@ -17,11 +17,11 @@ description: properties: clocks: minItems: 3 - maxItems: 4 + maxItems: 5 clock-names: minItems: 3 - maxItems: 4 + maxItems: 5 num-lanes: const: 1 diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml index 84ca12e8b25b..f41f704c6729 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml @@ -103,6 +103,7 @@ allOf: properties: clocks: minItems: 4 + maxItems: 4 clock-names: items: - const: pcie diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 1e05c560d797..4c76cd3f98a9 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -40,10 +40,11 @@ properties: - description: PCIe PHY clock. - description: Additional required clock entry for imx6sx-pcie, imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep. + - description: PCIe reference clock. clock-names: minItems: 3 - maxItems: 4 + maxItems: 5 interrupts: items: @@ -127,7 +128,7 @@ allOf: then: properties: clocks: - minItems: 4 + maxItems: 4 clock-names: items: - const: pcie @@ -140,11 +141,10 @@ allOf: compatible: enum: - fsl,imx8mq-pcie - - fsl,imx95-pcie then: properties: clocks: - minItems: 4 + maxItems: 4 clock-names: items: - const: pcie @@ -200,6 +200,23 @@ allOf: - const: mstr - const: slv + - if: + properties: + compatible: + enum: + - fsl,imx95-pcie + then: + properties: + clocks: + maxItems: 5 + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + - const: pcie_aux + - const: ref + unevaluatedProperties: false examples: