Message ID | 1727148464-14341-9-git-send-email-hongxing.zhu@nxp.com |
---|---|
State | New |
Headers | show |
Series | A bunch of changes to refine i.MX PCIe driver | expand |
On Tue, Sep 24, 2024 at 11:27:43AM +0800, Richard Zhu wrote: > Add iMX8MQ i.MX8Q and i.MX95 PCIe suspend/resume support. > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> > --- > drivers/pci/controller/dwc/pci-imx6.c | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 36df439d43ae..a8505cd3b53d 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -1497,7 +1497,8 @@ static const struct imx_pcie_drvdata drvdata[] = { > [IMX8MQ] = { > .variant = IMX8MQ, > .flags = IMX_PCIE_FLAG_HAS_APP_RESET | > - IMX_PCIE_FLAG_HAS_PHY_RESET, > + IMX_PCIE_FLAG_HAS_PHY_RESET | > + IMX_PCIE_FLAG_SUPPORTS_SUSPEND, > .gpr = "fsl,imx8mq-iomuxc-gpr", > .clk_names = imx8mq_clks, > .clks_cnt = ARRAY_SIZE(imx8mq_clks), > @@ -1535,13 +1536,15 @@ static const struct imx_pcie_drvdata drvdata[] = { > [IMX8Q] = { > .variant = IMX8Q, > .flags = IMX_PCIE_FLAG_HAS_PHYDRV | > - IMX_PCIE_FLAG_CPU_ADDR_FIXUP, > + IMX_PCIE_FLAG_CPU_ADDR_FIXUP | > + IMX_PCIE_FLAG_SUPPORTS_SUSPEND, > .clk_names = imx8q_clks, > .clks_cnt = ARRAY_SIZE(imx8q_clks), > }, > [IMX95] = { > .variant = IMX95, > - .flags = IMX_PCIE_FLAG_HAS_SERDES, > + .flags = IMX_PCIE_FLAG_HAS_SERDES | > + IMX_PCIE_FLAG_SUPPORTS_SUSPEND, > .clk_names = imx95_clks, > .clks_cnt = ARRAY_SIZE(imx95_clks), > .ltssm_off = IMX95_PE0_GEN_CTRL_3, > -- > 2.37.1 >
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 36df439d43ae..a8505cd3b53d 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -1497,7 +1497,8 @@ static const struct imx_pcie_drvdata drvdata[] = { [IMX8MQ] = { .variant = IMX8MQ, .flags = IMX_PCIE_FLAG_HAS_APP_RESET | - IMX_PCIE_FLAG_HAS_PHY_RESET, + IMX_PCIE_FLAG_HAS_PHY_RESET | + IMX_PCIE_FLAG_SUPPORTS_SUSPEND, .gpr = "fsl,imx8mq-iomuxc-gpr", .clk_names = imx8mq_clks, .clks_cnt = ARRAY_SIZE(imx8mq_clks), @@ -1535,13 +1536,15 @@ static const struct imx_pcie_drvdata drvdata[] = { [IMX8Q] = { .variant = IMX8Q, .flags = IMX_PCIE_FLAG_HAS_PHYDRV | - IMX_PCIE_FLAG_CPU_ADDR_FIXUP, + IMX_PCIE_FLAG_CPU_ADDR_FIXUP | + IMX_PCIE_FLAG_SUPPORTS_SUSPEND, .clk_names = imx8q_clks, .clks_cnt = ARRAY_SIZE(imx8q_clks), }, [IMX95] = { .variant = IMX95, - .flags = IMX_PCIE_FLAG_HAS_SERDES, + .flags = IMX_PCIE_FLAG_HAS_SERDES | + IMX_PCIE_FLAG_SUPPORTS_SUSPEND, .clk_names = imx95_clks, .clks_cnt = ARRAY_SIZE(imx95_clks), .ltssm_off = IMX95_PE0_GEN_CTRL_3,
Add iMX8MQ i.MX8Q and i.MX95 PCIe suspend/resume support. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> --- drivers/pci/controller/dwc/pci-imx6.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)