Message ID | 1690323318-6103-4-git-send-email-lizhi.hou@amd.com |
---|---|
State | New |
Headers | show
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Tue, 25 Jul 2023 17:15:32 -0500 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB07.amd.com (10.181.41.45) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Tue, 25 Jul 2023 15:15:32 -0700 Received: from xsjlizhih40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Tue, 25 Jul 2023 17:15:31 -0500 From: Lizhi Hou <lizhi.hou@amd.com> To: <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <robh@kernel.org> CC: Lizhi Hou <lizhi.hou@amd.com>, <max.zhen@amd.com>, <sonal.santan@amd.com>, <stefano.stabellini@xilinx.com> Subject: [PATCH V11 3/5] PCI: Add quirks to generate device tree node for Xilinx Alveo U50 Date: Tue, 25 Jul 2023 15:15:16 -0700 Message-ID: <1690323318-6103-4-git-send-email-lizhi.hou@amd.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1690323318-6103-1-git-send-email-lizhi.hou@amd.com> References: <1690323318-6103-1-git-send-email-lizhi.hou@amd.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT053:EE_|DS0PR12MB8525:EE_ X-MS-Office365-Filtering-Correlation-Id: 61f7ea85-aa94-4fb6-6ecf-08db8d5caa30 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Series |
Generate device tree node for pci devices
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expand
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diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 321156ca273d..6c0e7b6bbdd1 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -6138,3 +6138,14 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a2d, dpc_log_size); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a2f, dpc_log_size); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a31, dpc_log_size); #endif + +/* + * For a PCI device with multiple downstream devices, its driver may use + * a flattened device tree to describe the downstream devices. + * To overlay the flattened device tree, the PCI device and all its ancestor + * devices need to have device tree nodes on system base device tree. Thus, + * before driver probing, it might need to add a device tree node as the final + * fixup. + */ +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5020, of_pci_make_dev_node); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5021, of_pci_make_dev_node);