@@ -900,6 +900,7 @@
#define PCI_EXP_DEVCTL2_ATOMICOP_REQUESTER_EN 0x0040 /* AtomicOp RequesterEnable */
#define PCI_EXP_DEVCTL2_ATOMICOP_EGRESS_BLOCK 0x0080 /* AtomicOp Egress Blocking */
#define PCI_EXP_DEVCTL2_LTR 0x0400 /* LTR enabled */
+#define PCI_EXP_DEVCTL2_10BIT_TAG_REQ 0x1000 /* 10 Bit Tag Requester enabled */
#define PCI_EXP_DEVCTL2_OBFF(x) (((x) >> 13) & 3) /* OBFF enabled */
#define PCI_EXP_DEVSTA2 0x2a /* Device Status */
#define PCI_EXP_LNKCAP2 0x2c /* Link Capabilities */
@@ -1134,10 +1134,11 @@ static void cap_express_dev2(struct device *d, int where, int type)
}
w = get_conf_word(d, where + PCI_EXP_DEVCTL2);
- printf("\t\tDevCtl2: Completion Timeout: %s, TimeoutDis%c LTR%c OBFF %s,",
+ printf("\t\tDevCtl2: Completion Timeout: %s, TimeoutDis%c LTR%c 10BitTagReq%c OBFF %s,",
cap_express_dev2_timeout_value(PCI_EXP_DEVCTL2_TIMEOUT_VALUE(w)),
FLAG(w, PCI_EXP_DEVCTL2_TIMEOUT_DIS),
FLAG(w, PCI_EXP_DEVCTL2_LTR),
+ FLAG(w, PCI_EXP_DEVCTL2_10BIT_TAG_REQ),
cap_express_devctl2_obff(PCI_EXP_DEVCTL2_OBFF(w)));
if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_DOWNSTREAM)
printf(" ARIFwd%c\n", FLAG(w, PCI_EXP_DEVCTL2_ARI));
Decode 10-Bit Tag Requester Enable bit in Device Control 2 Register. Sample output changes: - DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- OBFF Disabled, ARIFwd- + DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- 10BitTagReq- OBFF Disabled, ARIFwd- Signed-off-by: Dongdong Liu <liudongdong3@huawei.com> --- lib/header.h | 1 + ls-caps.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-)